scholarly journals Non-stick on Pad Defect Reduction through Clamp and Insert Design Augmentation

Author(s):  
Antonio Sumagpang Jr. ◽  
Rennier Rodriguez ◽  
Frederick Ray Gomez

With new and continuous technology development and breakthroughs, few to several challenges in semiconductor assembly manufacturing are inevitable. One critical assembly process often affected with these technology trends and changes is the wirebond process. In due course, this paper focused on the elimination of non-stick on pad (NSOP) assembly defect at the wirebond process. Fishbone analysis and why-why analysis were done to comprehensively investigate the root-cause and eventually address the problem. High NSOP rejection rate was identified to be attributed to clamp and insert design, and was verified through series of analysis, design of experiment (DOE) and validation runs. Results revealed that by using the modified clamp and insert design with more holes would address NSOP rejection with around 90% defect reduction.

Author(s):  
Mu-Chun Wang ◽  
Kuo-Shu Huang ◽  
Zhen-Ying Hsieh ◽  
Shuang-Yuan Chen ◽  
Heng-Sheng Huang

While the process fabrication and the electronic applications develop quickly, the die size and the package type also confront the improvement from the customers’ request to achieve the better signal performance in IC products. In cost consideration and marketing competition, most of commercial IC products still adopt the wire-bond technology, except some high performance products with solder/gold balls adhesion process. For consumer ICs, the gold wire is the major material to connect the IC chip and the lead frame through the bondability technology. In the recent era, the bond pad size and pitch is always shrinking. Therefore, the bond performance strongly depends on wire bond machine to provide lighters, thinner, and more reliable IC. After pad size shrinkage, the quality of pad is more impressed for wire bond reliability, especially in fine-pitch assembly process. It’s a challenge in reliability requirement. In this study, the root cause and promising solution of bond pad contamination were investigated. One is to improve the bonding yield in wire-bond process; the other is to promote the bonding reliability after the whole assembly process.


2015 ◽  
Vol 79 (7) ◽  
pp. 99 ◽  
Author(s):  
Mark T. Holdsworth ◽  
Rucha Bond ◽  
Saumeel Parikh ◽  
Bahie Yacop ◽  
Kristina M. Wittstrom

2011 ◽  
Vol 314-316 ◽  
pp. 2370-2374
Author(s):  
Yin Hua Liu ◽  
Yang Yang

The process monitoring and diagnosis in assembly process is important. Multivariate T2 control charts are applied to detect the mean shift and interaction change in the assembly process. However, T2 charts can not identify the root cause of the change. The traditional MTY method for T2 signal decomposition is computationally expensive, especially when the dimension of the variables is high. A new approach based on Bayesian network to identify the significant cause of T2 signals is proposed in this paper. The headlamp bracket case is used to illustrate the overall procedure. And the effectiveness of the proposed approach is evaluated.


2018 ◽  
Author(s):  
Sze Yee Tan ◽  
Chiu Soon Wong ◽  
Chea Wee Lo ◽  
Cin Sheng Goh

Abstract In the back-end assembly process, all of the packages will be tested prior to disposition to the customers in order to filter out any device with failure. For a reject unit with an unknown failure mechanism, it will be subjected to a comprehensive failure analysis (FA) to identify the root cause of the failure. Non-destructive verification, following by front-side decapsulation and internal physical inspection is the common way to visualise and identify the physical defect that usually causes the failure of a device during the back-end assembly process. For certain failures, visualization of the defect might not be straight forward after the decapsulation because the defect may be embedded or buried underneath a layer or wedge bond on the die. In this case, a more complicated FA analysis flow which comprises various precision techniques such as parallel lapping, hotspot localisation and focused-ion-beam (FIB) analyses will be needed to thin down the top layer/wedge bond for a precise localisation of the defect prior to precision analysis by FIB. However, the process to thin down the top layer/wedge bond with an exposed die of a partially decapsulated package is a tricky job as artefacts such as crack/scratches on die are likely to be introduced during the process of polishing. Also it is relatively difficult to control the thickness and levelling of the top layer/wedge bond during the thinning process. In this work, we developed a method that allows the analyst to re-cap the partially decapped package, and also to precisely measure and thin down the top layer to an accuracy of less than < 2um without the introduction of artefacts.


2011 ◽  
Vol 2011 (1) ◽  
pp. 000232-000240 ◽  
Author(s):  
Christopher Matsuoka

Crane Aerospace & Electronics in Redmond, WA, develops, qualifies, and manufactures a variety of implantable devices for leading medical companies. An unusual phenomenon was discovered during a routine visual inspection step on a recent development project. On the flexible portion of a rigid-flex PCB assembly, visible radial cracks were found on the annular rings of ENIG-plated thru-holes. The thru-holes remain unpopulated during Crane’s assembly process, and the defect was primarily seen on the top side of the PCB. Additionally, the occurrences of these cracks vary in frequency and severity. This paper describes the testing and analysis Crane performed in order to determine the root cause of this defect.


Author(s):  
Lance Manuel

Abstract Since its inaugural issue in 1987, the ASME Journal of Offshore Mechanics and Arctic Engineering has been a mainstay in it support of original peer-reviewed research that advances the state of knowledge on all aspects of analysis, design, and technology development in ocean, offshore, arctic, and related fields. The journal's goals are to provide a forum for timely and in-depth exchanges of scientific and technical information among researchers and engineers. It emphasizes fundamental research and development studies as well as review articles that offer either retrospective perspectives on well-established topics or exposures to innovative or novel developments.


Author(s):  
B. Chokkalingam ◽  
M. Priya ◽  
R. Immanual ◽  
B. Varun

The primary objective of this work is to reduce blowhole defect occurring in a cast iron transfer box. The transfer box moulds were produced using green sand moulding process, and cores were made using CO2 process. It was found that the transfer box had a rejection rate as high as 60%, and it was mainly due to a blowhole on the top surface of the casting. The Ishikawa and risk Ishikawa diagrams were used to analyze this major defect. The risk Ishikawa diagram was constructed by assigning weights to the major and sub-causes due to which the defect occurs. Further, the probability of risk and its impact values were employed to compute risk scores for the main causes and also global risk. From the work carried out, it was found that that the moulds and the sands along with melting and pouring parameters were the major causes for this defect while damp chill, pouring delays and high moisture content in sand were identified as the root causes for the blowhole defect. The main root cause for the blowhole defect was pouring delay that eventually causes dampness in the chill pieces kept inside the moulds. The remedial measures of keeping the moisture content of the sand within 3.5% and pouring the moulds in the shift II within half an hour after closing them were implemented to eliminate it.


Author(s):  
Jong Hak Lee ◽  
Jae Yoon Lee ◽  
Dae Woo Kim ◽  
Kyoung Wook Jung ◽  
Soo Yong Son

Abstract As semiconductor device geometries shrink due to process technology development and circuit density rapidly increases, it is becoming extremely difficult to effectively analyze defects. Against this background, more precise and efficient techniques to analyze the root cause of defects is in constant demand. This paper proposes a method to quickly and accurately identify the true cause of device failure by using a nano probe EBAC/EBIC analysis technique. The most significant benefit of the EBAC/EBIC analysis technique is the ability to identify normal or abnormal circuit behavior with an intuitive image. This benefit can minimize the damage to a sample during the initial analysis phase, which has been an issue in the analysis of existing physical properties of semiconductors. In this paper, we identified the root cause of a series transistor defect in CIS (CMOS Image Sensor) product by using EBAC/EBIC (analysis) technique, and verified this with the assistance of SSRM (Scanning Spreading Resistance Microscopy) and APT (Atomic Probe Tomography). By doing so, we confirmed that the analysis technique proposed in this paper is very effective in identifying and pinpointing the true cause and location of the defect.


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