complex admittance
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2020 ◽  
Vol 10 (24) ◽  
pp. 8797
Author(s):  
Thomas A. Zirkle ◽  
Matthew J. Filmer ◽  
Jonathan Chisum ◽  
Alexei O. Orlov ◽  
Eva Dupont-Ferrier ◽  
...  

Single-electron tunneling transistors (SETs) and boxes (SEBs) exploit the phenomenon of Coulomb blockade to achieve unprecedented charge sensitivities. Single-electron boxes, however, despite their simplicity compared to SETs, have rarely been used for practical applications. The main reason for that is that unlike a SET where the gate voltage controls conductance between the source and the drain, an SEB is a two terminal device that requires either an integrated SET amplifier or high-frequency probing of its complex admittance by means of radio frequency reflectometry (RFR). The signal to noise ratio (SNR) for a SEB is small, due to its much lower admittance compared to a SET and thus matching networks are required for efficient coupling ofSEBs to an RFR setup. To boost the signal strength by a factor of N (due to a random offset charge) SEBs can be connected in parallel to form arrays sharing common gates and sources. The smaller the size of the SEB, the larger the charging energy of a SEB enabling higher operation temperature, and using devices with a small footprint (<0.01 µm2), a large number of devices (>1000) can be assembled into an array occupying just a few square microns. We show that it is possible to design SEB arrays that may compete with an SET in terms of sensitivity. In this, we tested SETs using RF reflectometry in a configuration with no DC through path (“DC-decoupled SET” or DCD SET) along with SEBs connected to the same matching network. The experiment shows that the lack of a path for a DC current makes SEBs and DCD SETs highly electrostatic discharge (ESD) tolerant, a very desirable feature for applications. We perform a detailed analysis of experimental data on SEB arrays of various sizes and compare it with simulations to devise several ways for practical applications of SEB arrays and DCD SETs.


2019 ◽  
Vol 19 (17) ◽  
pp. 7489-7498 ◽  
Author(s):  
Lusheng Zhai ◽  
Ruoyu Liu ◽  
Hongxin Zhang ◽  
Ningde Jin

2019 ◽  
Vol 4 (1) ◽  
pp. 73-77 ◽  
Author(s):  
Rangadhar Pradhan ◽  
Analava Mitra ◽  
Soumen Das

Abstract This paper reports on the impedimetric investigation of glucose concentrations present in the human blood by using impedance sensing devices with different working electrode areas. It is evident from the experiment that, the impedance value increases with the increase of glucose concentration in blood and the trend follows in all the devices with various electrode areas. The measured complex admittance plot shows two semicircles which are due to double layer and coating capacitances respectively. Lower values of relative standard deviation in impedance data infer the reproducibility of these devices. A quantitative relationship, developed between the impedance and glucose concentration establishes a positive correlation between the blood glucose values and impedance.


Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 553 ◽  
Author(s):  
Fikret Yildiz ◽  
Tadao Matsunaga ◽  
Yoichi Haga

This paper presents fabrication and packaging of a capacitive micromachined ultrasonic transducer (CMUT) using anodically bondable low temperature co-fired ceramic (LTCC). Anodic bonding of LTCC with Au vias-silicon on insulator (SOI) has been used to fabricate CMUTs with different membrane radii, 24 µm, 25 µm, 36 µm, 40 µm and 60 µm. Bottom electrodes were directly patterned on remained vias after wet etching of LTCC vias. CMUT cavities and Au bumps were micromachined on the Si part of the SOI wafer. This high conductive Si was also used as top electrode. Electrical connections between the top and bottom of the CMUT were achieved by Au-Au bonding of wet etched LTCC vias and bumps during anodic bonding. Three key parameters, infrared images, complex admittance plots, and static membrane displacement, were used to evaluate bonding success. CMUTs with a membrane thickness of 2.6 µm were fabricated for experimental analyses. A novel CMUT-IC packaging process has been described following the fabrication process. This process enables indirect packaging of the CMUT and integrated circuit (IC) using a lateral side via of LTCC. Lateral side vias were obtained by micromachining of fabricated CMUTs and used to drive CMUTs elements. Connection electrodes are patterned on LTCC side via and a catheter was assembled at the backside of the CMUT. The IC was mounted on the bonding pad on the catheter by a flip-chip bonding process. Bonding performance was evaluated by measurement of bond resistance between pads on the IC and catheter. This study demonstrates that the LTCC and LTCC side vias scheme can be a potential approach for high density CMUT array fabrication and indirect integration of CMUT-IC for miniature size packaging, which eliminates problems related with direct integration.


2018 ◽  
Vol 123 (17) ◽  
pp. 174305
Author(s):  
Yan Li ◽  
Shu-Xiao Li ◽  
Fei Gao ◽  
Hai-Ou Li ◽  
Gang Xu ◽  
...  

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