SiC power MOSFETs and their application

Author(s):  
Alberto Castellazzi ◽  
Andrea Irace
Keyword(s):  
2014 ◽  
Vol 9 (4) ◽  
pp. 671 ◽  
Author(s):  
Paolo Giammatteo ◽  
Concettina Buccella ◽  
Carlo Cecati

Author(s):  
Ian Kearney ◽  
Hank Sung

Abstract Low voltage power MOSFETs often integrate voltage spike protection and gate oxide ESD protection. The basic concept of complete-static protection for the power MOSFETs is the prevention of static build-up where possible and the quick, reliable removal of existing charges. The power MOSFET gate is equivalent to a low voltage low leakage capacitor. The capacitor plates are formed primarily by the silicon gate and source metallization. The capacitor dielectric is the silicon oxide gate insulation. Smaller devices have less capacitance and require less charge per volt and are therefore more susceptible to ESD than larger MOSFETs. A FemtoFETTM is an ultra-small, low on-resistance MOSFET transistor for space-constrained handheld applications, such as smartphones and tablets. An ESD event, for example, between a fingertip and the communication-port connectors of a cell phone or tablet may cause permanent system damage. Through electrical characterization and global isolation by active photon emission, the authors identify and distinguish ESD failures. Thermographic analysis provided additional insight enabling further separation of ESD failmodes. This paper emphasizes the role of failure analysis in new product development from the create phase through to product ramp. Coupled with device electrical simulation, the analysis observations led to further design enhancement.


2008 ◽  
Vol 600-603 ◽  
pp. 895-900 ◽  
Author(s):  
Anant K. Agarwal ◽  
Albert A. Burk ◽  
Robert Callanan ◽  
Craig Capell ◽  
Mrinal K. Das ◽  
...  

In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.


1995 ◽  
Vol 35 (3) ◽  
pp. 603-608 ◽  
Author(s):  
S.R. Anderson ◽  
R.D. Schrimpf ◽  
K.F. Galloway ◽  
J.L. Titus

Author(s):  
Kota Tomita ◽  
Tatsuya Shiraishi ◽  
Hiroaki Kato ◽  
Hiroyuki Kishimoto ◽  
Katsura Miyashita ◽  
...  

Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 324
Author(s):  
Carmelo Barbagallo ◽  
Santi Agatino Rizzo ◽  
Giacomo Scelba ◽  
Giuseppe Scarcella ◽  
Mario Cacciato

This work presents a step-by-step procedure to estimate the lifetime of discrete SiC power MOSFETs equipping three-phase inverters of electric drives. The stress of each power device when it is subjected to thermal jumps from a few degrees up to about 80 °C was analyzed, starting from the computation of the average power losses and the commitment of the electric drive. A customizable mission profile was considered where, by accounting the working conditions of the drive, the corresponding average power losses and junction temperatures of the SiC MOSFETs composing the inverter can be computed. The tool exploits the Coffin–Manson theory, rainflow counting, and Miner’s rule for the lifetime estimation of the semiconductor power devices. Different operating scenarios were investigated, underlying their impact on the lifetime of SiC MOSFETs devices. The lifetime estimation procedure was realized with the main goal of keeping limited computational efforts, while providing an effective evaluation of the thermal effects. The method enables us to set up any generic mission profile from the electric drive model. This gives us the possibility to compare several operating scenario of the drive and predict the worse operating conditions for power devices. Finally, although the lifetime estimation tool was applied to SiC power MOSFET devices for a general-purpose application, it can be extended to any type of power switch technology.


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