Considerations for Neuromorphic Supercomputing in Semiconducting and Superconducting Optoelectronic Hardware

Any large-scale spiking neuromorphic system striving for complexity at the level of the human brain and beyond will need to be co-optimized for communication and computation. Such reasoning leads to the proposal for optoelectronic neuromorphic platforms that leverage the complementary properties of optics and electronics. Starting from the conjecture that future large-scale neuromorphic systems will utilize integrated photonics and fiber optics for communication in conjunction with analog electronics for computation, we consider two possible paths toward achieving this vision. The first is a semiconductor platform based on analog CMOS circuits and waveguide-integrated photodiodes. The second is a superconducting approach that utilizes Josephson junctions and waveguide-integrated superconducting single-photon detectors. We discuss available devices, assess scaling potential, and provide a list of key metrics and demonstrations for each platform. Both platforms hold potential, but their development will diverge in important respects. Semiconductor systems benefit from a robust fabrication ecosystem and can build on extensive progress made in purely electronic neuromorphic computing but will require III-V light source integration with electronics at an unprecedented scale, further advances in ultra-low capacitance photodiodes, and success from emerging memory technologies. Superconducting systems place near theoretically minimum burdens on light sources (a tremendous boon to one of the most speculative aspects of either platform) and provide new opportunities for integrated, high-endurance synaptic memory. However, superconducting optoelectronic systems will also contend with interfacing low-voltage electronic circuits to semiconductor light sources, the serial biasing of superconducting devices on an unprecedented scale, a less mature fabrication ecosystem, and cryogenic infrastructure.

A Remote Sensing Scheme for Fault Diagnosis to Wind Turbines: An Academic Experimental Set-Up

Nowadays, remote sensing for structural fault examination to wind turbines is an important technological challenger. On the other hand, laser diodes represent a low-cost option to implement a remote vibrometer sensor by just using cheap analog electronics. Therefore, a recent electronic circuit along with a laser diode is conceived to detect faults on a winding structure due to vibrations mainly induced by the wind and its rotary parts with possible mechanical defects. The electronic parts consist of a sequence of bandpass filters and peak detector stages. Besides, an academic experimental platform is constructed to validate the performance of the proposed remote sensing scheme for fault diagnosis in wind turbine structures.

A Codesigned Integrated Photonic Electronic Neuron

In the modern era of artificial intelligence, increasingly sophisticated artificial neural networks (ANNs) are implemented, which pose challenges in terms of execution speed and power consumption. To tackle this problem, recent research on reduced-precision ANNs opened the possibility to exploit analog hardware for neuromorphic acceleration. In this scenario, photonic-electronic engines are emerging as a short-medium term solution to exploit the high speed and inherent parallelism of optics for linear computations needed in ANN, while resorting to electronic circuitry for signal conditioning and memory storage. In this paper we introduce a precision-scalable integrated photonic-electronic multiply-accumulate neuron, namely PEMAN. The proposed device relies on (i) an analog photonic engine to perform reduced-precision multiplications at high speed and low power, and (ii) an electronic front-end for accumulation and application of the nonlinear activation function by means of a nonlinear encoding in the analog-to-digital converter (ADC). The device, based on the iSiPP50G SOI process for the photonic engine and a commercial 28 nm CMOS process for the electronic front end, has been numerically validated through cosimulations to perform multiply-accumulate operations (MAC). PEMAN exhibits a multiplication accuracy of 6.1 ENOB up to 10 GMAC/s, while it can perform computations up to 56 GMAC/s with a reduced accuracy down to 2.1 ENOB. The device can trade off speed with resolution and power consumption, it outperforms its analog electronics counterparts both in terms of speed and power consumption, and brings substantial improvements also compared to a leading GPU.

A Codesigned Integrated Photonic Electronic Neuron

In the modern era of artificial intelligence, increasingly sophisticated artificial neural networks (ANNs) are implemented, which pose challenges in terms of execution speed and power consumption. To tackle this problem, recent research on reduced-precision ANNs opened the possibility to exploit analog hardware for neuromorphic acceleration. In this scenario, photonic-electronic engines are emerging as a short-medium term solution to exploit the high speed and inherent parallelism of optics for linear computations needed in ANN, while resorting to electronic circuitry for signal conditioning and memory storage. In this paper we introduce a precision-scalable integrated photonic-electronic multiply-accumulate neuron, namely PEMAN. The proposed device relies on (i) an analog photonic engine to perform reduced-precision multiplications at high speed and low power, and (ii) an electronic front-end for accumulation and application of the nonlinear activation function by means of a nonlinear encoding in the analog-to-digital converter (ADC). The device, based on the iSiPP50G SOI process for the photonic engine and a commercial 28 nm CMOS process for the electronic front end, has been numerically validated through cosimulations to perform multiply-accumulate operations (MAC). PEMAN exhibits a multiplication accuracy of 6.1 ENOB up to 10 GMAC/s, while it can perform computations up to 56 GMAC/s with a reduced accuracy down to 2.1 ENOB. The device can trade off speed with resolution and power consumption, it outperforms its analog electronics counterparts both in terms of speed and power consumption, and brings substantial improvements also compared to a leading GPU.

A random signal generator by using analog electronics

The describing function theory is a powerful mathematical tool to predict oscillations in non-linear dynamical systems. This theory is here invoked to design a random signal generator and realized by using analog electronic elements. Then, and according to experimental results, histograms of the resultant signal are shown along with the generated signal in the time domain. Finally, the proposed electronic circuit is simple and cheap to construct.

Quality analysis of a learning media analog electronics on the Android platform with ISO 25010

The design of analog electronics learning media applications needs quality analysis. ISO 25010 is one of the standard references in measuring the quality of an Android-based application product. Analysis that can be done is by testing the compatibility and performance efficiency aspect of the media being developed. This study uses a Research and Development (R&D) method with the ADDIE development model which will produced a quality analog electronics learning media application. Data collection was conducted used a cloud testing and direct testing. Before data collection was conducted validity of media by expert judgement. The results showed that media is "valid" and the quality of the compatibility aspect this media learning was supported on more than 208 smartphones android device and performance efficiency predicate “Satisfied” so that the application could be used for the learning process during the COVID-19 pandemic or tested on other quality aspects.