Solution Processed Low Voltage Metal-Oxide transistor by using TiO2 /Li-Al2O3 stacked Gate Dielectric

A solution processed top-contact bottom gated SnO2 thin-film transistor (TFT) has been fabricated by using a TiO2/ Li-Al2O3 bilayer stacked gate dielectric that show operating voltage of this TFT within 2.0 V. It is observed that the bilayer dielectric has much higher areal capacitance with lower leakage current density that significantly improve the overall device performance of TFT. The TFT with bilayer gate dielectric shows an effective carrier mobility (µsat) of 9.2 cm2V− 1s− 1 with an on/off ratio of 7.1x103 which are significantly higher with respect to the TFT with a single layer Li-Al2O3 gate dielectric. The origin of this improvement is due to the Schottky junction between the highly doped silicon (p++-Si) and TiO2 of bilayer stacked dielectric that induced electrons to the channel which reduces the dielectric/semiconductor interface trap state. This investigation opens a new path to develop TFT device performance using a suitable bilayer stack of gate-dielectric.

Use of Bilayer Gate Insulator in GaN-on-Si Vertical Trench MOSFETs: Impact on Performance and Reliability

We propose to use a bilayer insulator (2.5 nm Al2O3 + 35 nm SiO2) as an alternative to a conventional uni-layer Al2O3 (35 nm), for improving the performance and the reliability of GaN-on-Si semi vertical trench MOSFETs. This analysis has been performed on a test vehicle structure for module development, which has a limited OFF-state performance. We demonstrate that devices with the bilayer dielectric present superior reliability characteristics than those with the uni-layer, including: (i) gate leakage two-orders of magnitude lower; (ii) 11 V higher off-state drain breakdown voltage; and (iii) 18 V higher gate-source breakdown voltage. From Weibull slope extractions, the uni-layer shows an extrinsic failure, while the bilayer presents a wear-out mechanism. Extended reliability tests investigate the degradation process, and hot-spots are identified through electroluminescence microscopy. TCAD simulations, in good agreement with measurements, reflect electric field distribution near breakdown for gate and drain stresses, demonstrating a higher electric field during positive gate stress. Furthermore, DC capability of the bilayer and unilayer insulators are found to be comparable for same bias points. Finally, comparison of trapping processes through double pulsed and Vth transient methods confirms that the Vth shifts are similar, despite the additional interface present in the bilayer devices.

Polymer/oxide bilayer dielectric for hysteresis-minimized 1 V operating 2D TMD transistors

By inserting hydroxyl-group free organic dielectric between hydrophilic oxide dielectric and 2D TMD channel, highly stable 2D FETs are achieved. This concept was successfully extended to a practical device application such as stable 1 V operation of 2D MoTe2 FET.