Study of characteristics of n-p-n type bipolar power transistor in small-sized metalpolymeric package type SOT-89

In this study the input, output and current gain characteristics of silicon n-p-n type medium power bipolar junction transistors KT242A91 made by the "GRUPPA KREMNY EL" in modern small-sized metalpolymeric package type (SOT-89) have been obtained. The SPICE model that allows simulating realistic transistor behaviour of n-p-n type transistor KT242A91 has been proposed. It is shown that established experimental characteristics for KT242A91 transistor correspond to similar transistor’s type characteristics.

Rancangbangun Catu Daya Linier 5V, 12V dengan ZCD dan PWM

Penelitian ini dilakukan untuk mendapatkan sebuah prototype rangkaian catu daya linier yang dilengkapi dengan rangkaian zero crossing detector dan pembangkit PWM yang dapat digunakan sebagai pelengkap modul praktikum elektronika daya, terutama pada percobaan pengendaliaaan beban ac dengan TRIAC secara digital. Pemicuan dapat dilakukan berdasar sudut fasa, yang memerlukan pulsa ZCD dan pemicuan on-off yang memerlukan PWM. Catu daya linier dipilih dalam rancangbangun ini dengan alasan kemudahan perhitungan rancangan dan mempunyai gangguaninterferensi frekuensi radio yang rendah. Tegangan output catu daya linier adalah 5V dan 12V dengan arus output hingga 1.000 mA. Komponen utama rangkaian catu daya linier adalah regulator IC type LM78XX dengan penguat arus transistor type pnp. Pembangkitan PWM dilakukan dengan kendali ATmega328. Frekuensi output dapat dipilih dari 1dan 2 Hz serta variasi duty cycle, 0,2, 05, 07 dan 1. Pemilihan nilai frekuensi dan duty cycle dilakukan dengan rotary encoder switch. Pulsa output rangkaian ZCD dan PWM dirancang untuk standar TTL. Berdasar peruntukannya maka perangkat catu daya linier ini dilengkapi dengan pengaman hubung singkat pada jalur keluarannya. This research was conducted to obtain a linear power supply circuit prototype equipped with a zero crossing detector circuit and a PWM generator that can be used as a complement to the power electronics practicum module, especially in the experiment of digitally control loads with a TRIAC. Triggering can be done based on phase angle, which requires ZCD pulses and on-off triggering which requires PWM. The linear power supply was chosen in this design for the reason that it is easy to calculate the design and has low radio frequency interferency. The output voltage of the linear power supply is 5V and 12V with an output current of up to 1,000 mA. The main component of the linear power supply circuit is the LM78XX type regulator IC with a PNP type transistor current amplifier. PWM generation is carried out by controlling the ATmega328.The output frequency can be selected from 1 and 2 Hz as well as variations of the duty cycle, 0.2, 05, 07 and 1. The selection of the frequency and duty cycle values ​​is done by a rotary encoder switch. The output pulses of the ZCD and PWM circuits are designed for the TTL standard. Based on its designation, this linear power supply device is equipped with a safety short circuit on its output line.

Electrical Coupling of Monolithic 3D Inverters (M3INVs): MOSFET and Junctionless FET

In this paper, we investigated the electrical coupling between the top and bottom transistors in a monolithic 3-dimensional (3D) inverter (M3INV) stacked vertically with junctionless field-effect transistor (JLFET), which is one of candidates to replace metal-oxide-semiconductor field-effect transistors (MOSFET). Currents, transconductances, and gate capacitances of the top N-type transistor at the different gate voltages of the bottom P-type transistor as a function of thickness of inter-layer dielectric (TILD) and gate channel length (Lg) are simulated using technology computer-aided-design (TCAD). In M3INV stacked vertically with MOSFET (M3INV-MOS) and JLFET (M3INV-JL), the variations of threshold voltage, transconductance, and capacitance increase as TILD decreases and they increase as Lg increases, and thus there is a strong coupling in M3INV at the range of TILD ≤ 30 nm. In M3INV, the coupling between stacked JLFETs in M3INV-JL is larger than that between MOSFETs in M3INV-MOS at the same TILD and Lg. The switching threshold voltage (Vm) and noise margins (NMs) of M3INV are calculated from the voltage transfer characteristics (VTC) simulated with TCAD mixed-mode. As the gate lengths of M3INV-MOS and M3INV-JL increase, the Vm variations increase and decrease, respectively. The smaller the gate lengths of M3INV-NOS and M3INV-JL, the larger and smaller the variation of Vm, respectively. The noise margin of M3INV-MOS is larger and better for inverter characteristics than one of M3INV-JL. M3INV-MOS has less electrical coupling than M3INV-JL.

Solution-Processed Organic and Oxide Hybrid CMOS Inverter for Low Cost Electronic Circuits

We demonstrated an organic and oxide hybrid CMOS inverter with the solution-processed semiconductor and source/drain electrodes. For the solution-processed n- and p-type semiconductor, InGaZnO solution and TIPS-pentacene/PαMS blend were spin-coated respectively while Silver ink and PEDOT:PSS solution were drop-casted with the help of the bank to serve as source/drain electrodes. The InGaZnO and the TIPS-pentacene transistors show typical n- and p-type transistor operations with low off-current. Based on the combination of the solution-processed n- and p-type transistors, full-swing characteristic curve with low static current of the hybrid CMOS were obtained.