Dislocation-Based Thermodynamic Models of V-Pits Formation and Strain Relaxation in InGaN/GaN Epilayers on Si Substrates

Author(s):  
Khaled H. Khafagy ◽  
Tarek M. Hatem ◽  
Salah M. Bedair
1999 ◽  
Vol 594 ◽  
Author(s):  
M. E. Ware ◽  
R. J. Nemanich

AbstractThis study explores stress relaxation of epitaxial SiGe layers grown on Si substrates with unique orientations. The crystallographic orientations of the Si substrates used were off-axis from the (001) plane towards the (111) plane by angles, θ = 0, 10, and 22 degrees. We have grown 100nm thick Si(1−x) Ge(x) epitaxial layers with x=0.3 on the Si substrates to examine the relaxation process. The as-deposited films are metastable to the formation of strain relaxing misfit dislocations, and thermal annealing is used to obtain highly relaxed films for comparison. Raman spectroscopy has been used to measure the strain relaxation, and atomic force microscopy has been used to explore the development of surface morphology. The Raman scattering indicated that the strain in the as-deposited films is dependent on the substrate orientation with strained layers grown on Si with 0 and 22 degree orientations while highly relaxed films were grown on the 10 degree substrate. The surface morphology also differed for the substrate orientations. The 10 degree surface is relatively smooth with hut shaped structures oriented at predicted angles relative to the step edges.


2004 ◽  
Vol 809 ◽  
Author(s):  
Klara Lyutovich ◽  
Erich Kasper ◽  
Michael Oehme

ABSTRACTVirtual substrates with ultra-thin SiGe strain relaxed buffers have been grown on Si substrates by a method employing point defect supersaturation in the growing layers. A concept of the point defect influence on the strain relaxation and on defect interactions in layers has been proposed. A method is developed to increase the degree of relaxation in sub-100 nm SiGe buffer layers and to provide a smooth surface morphology. Layer growth has been realized by solid source molecular beam epitaxy in a chamber equipped with an in situ monitoring system. One of the growth stages, performed at a very low temperature, serves the generation of point defects. Strain relaxation tunable up to the high degree and a crosshatch-free surface morphology are demonstrated in 40nm thick SiGe buffers which contain 40-45% Ge.Growth monitoring enables the control of the process window and the layer crystallization by a chosen mechanism.Virtual substrates produced by the described method were successfully tested in nMODFET structures.


2006 ◽  
Vol 121 (2) ◽  
pp. 375-378 ◽  
Author(s):  
D. Colombo ◽  
E. Grilli ◽  
M. Guzzi ◽  
S. Sanguinetti ◽  
A. Fedorov ◽  
...  

1998 ◽  
Vol 05 (01) ◽  
pp. 133-138 ◽  
Author(s):  
I. Berbezier ◽  
B. Gallas ◽  
J. Derrien

We have investigated the elastic strain relaxation in Si 1-x Ge x layers grown by the molecular beam epitaxy (MBE) technique and in situ controlled with RHEED. Up to ≈0.8% critical lattice mismatch (about 20% Ge) uniform strained and flat layers were grown both on (111) and on (001) Si substrates. Calculations of the elastic constants evidenced a tetragonal distortion about 50% higher on (001) than on (111) in the same experimental conditions. At higher misfits (and/or thicknesses) a growth instability was evidenced only on (001) Si substrates. Si 1-x Ge x layers there displayed a surface layer undulation. On the contrary, Si 1-x Ge x layers grown on (111) Si substrates remained smooth throughout the growth up to the plastic relaxation of the layers. To determine stress fields in the Si 1-x Ge x layers, a high spatial resolution convergent beam electron diffraction (CBED) experiment was performed with a field effect analytical microscope. The CBED technique was applied to two typical cases: totally strained layer and undulated dislocation-free layer. In the latter case, CBED patterns recorded on nanometer scale areas of an undulation crest (cross-section sample) showed a gradual elastic relaxation mainly directed along the growth axis (z). Moreover a triclinic distortion of the unit cell was pointed out. These results were confirmed on a plane view sample. In conclusion, our results show that the driving force for the undulation is not the in-plane elastic relaxation since CBED experiments proved an important elastic relaxation of the (001) Si 1-x Ge x layers along the z axis. This was in agreement with the calculations of the elastic constants. We think that this could be at the origin of the undulation.


2004 ◽  
Vol 45 (8) ◽  
pp. 2644-2646 ◽  
Author(s):  
Junji Yamanaka ◽  
Kentaro Sawano ◽  
Kiyokazu Nakagawa ◽  
Kumiko Suzuki ◽  
Yusuke Ozawa ◽  
...  

1988 ◽  
Vol 116 ◽  
Author(s):  
A. Freundlich ◽  
G. Neu ◽  
A. Leycuras ◽  
R. Carles ◽  
C. Verie

AbstractResidual stress in MOVPE grown GaAs on (100)Si substrates is investigated using Haman spectroscopy, X-ray diffraction, low temperature photoluminescence and photoluminescence excitation spectroscopy experiments. At room temperature, 2 µm-thick GaAs/Si is found to be under biaxial (100) tensile stress of X = 1.8 ± 0.3 kbar, near the epilayer surface. The stress magnitude decreases as the distance from interface decreases. PL and PLE studies on post-growth thermally annealed GaAs/Si reveal coexistence of unstrained and strained GaAs.


1998 ◽  
Vol 533 ◽  
Author(s):  
K. Rim ◽  
T. O. Mitchell ◽  
J. L. Hoyt ◽  
G. Fountain ◽  
J. F. Gibbons

AbstractThe first demonstration of n-MOSFETs fabricated using strained Si1-yCy surface channels is reported. Tensile-strained Si1-yCy layers with substitutional carbon contents up to 0.8 atomic percent were epitaxially grown on <100> Si substrates by rapid thermal chemical vapor deposition, using silane and methylsilane as the silicon and carbon precursors. n-MOSFETS were fabricated using standard MOS processing with reduced thermal exposure to minimize the possibility of strain relaxation. A remote plasma CVD oxide was employed to form the gate oxide. The Si1-yCy devices exhibit electrical characteristics that are typical for Si n-MOSFETs, with good turn-on and subthreshold characteristics. MOS capacitance-voltage analysis demonstrates comparable oxide interface qualities for the Si1-yCy and Si control devices. No carbon-related leakage current is observed in source and drain diode junctions. Characterization of the MOSFET electron inversion layer mobility at room temperature shows comparable mobilities, within the sensitivity of the measurement, for the Si1-yCy and Si control devices. This is in contrast to the mobility enhancement observed in n-MOSFETs fabricated using tensile- strained Si grown on relaxed Si1-xGex layers. At low temperatures, the inversion layer mobility of Si1-yCy devices is lower than that of the Si controls, and appears to be affected by Coulomb and possibly random alloy scattering.


1993 ◽  
Vol 8 (1S) ◽  
pp. S337-S341 ◽  
Author(s):  
H Zogg ◽  
C Maissen ◽  
S Blunier ◽  
S Teodoropol ◽  
R M Overney ◽  
...  

2003 ◽  
Vol 42 (Part 2, No. 7A) ◽  
pp. L735-L737 ◽  
Author(s):  
Kentarou Sawano ◽  
Yoshihisa Hirose ◽  
Yusuke Ozawa ◽  
Shinji Koh ◽  
Junji Yamanaka ◽  
...  

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