Design of Efficient, Dependable SoCs Based on a Cross-Layer-Reliability Approach with Emphasis on Wireless Communication as Application and DRAM Memories

AbstractMany applications show an inherent error resilience due to their probabilistic behavior. This inherent error resilience can be exploited to reduce the design margin for advanced technology nodes resulting in more energy and area efficient implementation. We present in this chapter a cross-layer approach for efficient reliability management in wireless baseband processing with special emphasis on memories since memories are most susceptible to dependability problems. A multiple-antenna (MIMO) system will be used as design example. Further on we focus on DRAMs (Dynamic Random Access Memories). All today’s computing systems rely on dependable DRAMs. In the future DRAM memories will become more undependable due to further scaling. This has to be counterbalanced with higher refresh rates, which leads to a higher DRAM power consumption. Recent research activities resulted in the concept of “approximate DRAM” to save power and improve performance by lowering the refresh rate or disabling refresh completely. Here, we present a holistic simulation environment for investigations on approximate DRAM and show the impact on error-resilient applications.

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Evaluation of Thermal Stability of Spin-Transfer Torque based Magnoresistive Random-Access Memory for Cache Applications in Advanced Technology Nodes

2018 IEEE International Magnetics Conference (INTERMAG) ◽

10.1109/intmag.2018.8508685 ◽

2018 ◽

Author(s):

H. Dixit ◽

S. Agarwal ◽

D. Datta ◽

A. Jacob ◽

D. Shum ◽

...

Keyword(s):

Thermal Stability ◽

Random Access ◽

Random Access Memory ◽

Spin Transfer Torque ◽

Spin Transfer ◽

Advanced Technology ◽

Access Memory ◽

Technology Nodes ◽

Thermal Stability Of

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Sensing Circuit Design Techniques for RRAM in Advanced CMOS Technology Nodes

Micromachines ◽

10.3390/mi12080913 ◽

2021 ◽

Vol 12 (8) ◽

pp. 913

Author(s):

Donglin Zhang ◽

Bo Peng ◽

Yulin Zhao ◽

Zhongze Han ◽

Qiao Hu ◽

...

Keyword(s):

Random Access ◽

Cmos Technology ◽

Resistive Random Access Memory ◽

Advanced Technology ◽

Access Time ◽

The Novel ◽

Application Range ◽

Design And Optimization ◽

Technology Nodes ◽

Novel Design

Resistive random access memory (RRAM) is one of the most promising new nonvolatile memories because of its excellent properties. Moreover, due to fast read speed and low work voltage, it is suitable for seldom-write frequent-read applications. However, as technology nodes shrink, RRAM faces many issues, which can significantly degrade RRAM performance. Therefore, it is necessary to optimize the sensing schemes to improve the application range of RRAM. In this paper, the issues faced by RRAM in advanced technology nodes are summarized. Then, the advantages and weaknesses in the novel design and optimization methodologies of sensing schemes are introduced in detail from three aspects, the reference schemes, sensing amplifier schemes, and bit line (BL)-enhancing schemes, according to the development of technology in especially recent years, which can be the reference for designing the sensing schemes. Moreover, the waveforms and results of each method are illustrated to make the design easy to understand. With the development of technology, the sensing schemes of RRAM become higher speed and resolution, low power consumption, and are applied at advanced technology nodes and low working voltage. Now, the most advanced nodes the RRAM applied is 14 nm node, the lowest working voltage can reach 0.32 V, and the shortest access time can be only a few nanoseconds.

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Use of Second Harmonic and Thermal Effects of Laser Voltage Probing for Better Fault Isolation

ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2016p0514 ◽

2016 ◽

Author(s):

Ramya Yeluri ◽

Ravishankar Thirugnanasambandam ◽

Cameron Wagner ◽

Jonathan Urtecho ◽

Jan M. Neirynck

Keyword(s):

Duty Cycle ◽

Thermal Effects ◽

Second Harmonic ◽

Fault Isolation ◽

Advanced Technology ◽

Temperature Dependent ◽

First Case ◽

Improve Accuracy ◽

Degradation Monitoring ◽

Technology Nodes

Abstract Laser voltage probing (LVP) has been extensively used for fault isolation over the last decade; however fault isolation in practice primarily relies on good-to-bad comparisons. In the case of complex logic failures at advanced technology nodes, understanding the components of the measured data can improve accuracy and speed of fault isolation. This work demonstrates the use of second harmonic and thermal effects of LVP to improve fault isolation with specific examples. In the first case, second harmonic frequency is used to identify duty cycle degradation. Monitoring the relative amplitude of the second harmonic helps identify minute deviations in the duty cycle with a scan over a region, as opposed to collecting multiple high resolution waveforms at each node. This can be used to identify timing degradation such as signal slope variation as well. In the second example, identifying abnormal data at the failing device as temperature dependent effect helps refine the fault isolation further.

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