An Efficient Phase Shift Full Bridge DC/DC Converter with Wide Range Voltage Output: Design and Hardware Implementation

Author(s):  
Cheng-Lun Chen ◽  
Cong-Sheng Huang
2018 ◽  
Vol 27 (08) ◽  
pp. 1850125
Author(s):  
Sakshi ◽  
Ravi Kumar

Adaptive filters have wide range of applications in areas such as echo or interference cancellation, prediction and system identification. Due to high computational complexity of adaptive filters, their hardware implementation is not an easy task. However, it becomes essential in many cases where real-time execution is needed. This paper presents the design and hardware implementation of a variable step size 40 order adaptive filter for de-noising acoustic signals. To ensure an area efficient implementation, a novel structure is being proposed. The proposed structure eliminates the requirement of extra registers for storage of delayed inputs thereby reducing the silicon area. The structure is compared with direct-form and transposed-form structures by adapting the filter coefficients using four different variants of the least means square (LMS) algorithm. Subsequently, the filters are implemented on three different field programmable gate arrays (FPGAs) viz. Spartan 6, Virtex 6 and Virtex 7 to find out the best device family that can be used to implement an Adaptive noise canceller (ANC) by comparing speed, power and area utilization. The synthesis results clearly reveal that ANC designed using the proposed structure has resulted in a reduction in silicon area without incurring any significant overhead in terms of power or delay.


2013 ◽  
Vol 28 (7) ◽  
pp. 3308-3316 ◽  
Author(s):  
Young-Do Kim ◽  
Kyu-Min Cho ◽  
Duk-You Kim ◽  
Gun-Woo Moon

1948 ◽  
Vol 36 (9) ◽  
pp. 1096-1100 ◽  
Author(s):  
G. Willoner ◽  
F. Tihelka
Keyword(s):  

2021 ◽  
Author(s):  
Al-Hussein El-Shafie ◽  
Mohamed Zaki ◽  
Serag Habib

<div>The object tracking research continues to be active since long period because of the several real-world variations imposed in the tracking process, like occlusion, changing appearance, illumination changes and cluttered background. With wide range of applications, embedded implementations are typically pursed for the tracking systems. Although object trackers based on Convolution Neural Network (CNN) have achieved state-of-the-art performance, they challenge the embedded implementations because of slow speed and large memory requirement. In this paper, we address these limitations on the algorithm-side and the circuitside. On the algorithm side, we adopt interpolation schemes which can significantly reduce the processing time and the memory storage requirements. We also evaluate the approximation of the hardware-expensive computations aiming for an efficient hardware implementation. Moreover, we modified the online-training scheme in order to achieve a constant processing time across all video frames. On the circuit side, we developed a hardware accelerator of the online training stage. We avoid the transposed reading from the external memory to speed-up the data movement with no performance degradation. Our proposed hardware accelerator achieves 45.9 frames-per-second in training the fully connected layers.</div>


Electronics ◽  
2018 ◽  
Vol 7 (10) ◽  
pp. 255 ◽  
Author(s):  
Javier Vázquez ◽  
Pedro Roncero-Sánchez ◽  
Alfonso Parreño Torres

When applied to road vehicle electrification, inductive power transfer (IPT) technology has the potential to boost the transition from combustion engines to electric motors powered by a battery pack. This work focuses on the validation of a PSpice circuit model developed as a replica of a 2-kW IPT prototype with series-series compensation operating at 18.65 kHz. The laboratory prototype has the three stages commonly found in an IPT system: an inverter, controlled by the phase-shift technique, a coil coupling and a load. Simulations were run with the circuit model for three different distances between the two coils of the inductive coupling, all of which are of interest for practical chargers: 125, 150 and 175 mm. The validation approach was based on tuning the magnetic coupling factor for each distance and a set of ten load resistances, until the best match between the simulated and the experimental peak currents supplied by the inverter was found in each case. The coupling factors obtained from the simulation work are in good agreement with their experimental counterparts for the three distances, provided the duty cycle of the inverter output voltage is not too small. The circuit model developed is, therefore, able to reproduce the behavior of the laboratory prototype with sufficient accuracy over a wide range of distances between coils and loading conditions.


1969 ◽  
Vol 5 (23) ◽  
pp. 588
Author(s):  
A.K.H. Miller

Author(s):  
Young-Do Kim ◽  
Kyu-Min Cho ◽  
Duk-You Kim ◽  
Byoung-Hee Lee ◽  
Chol-Ho Kim ◽  
...  

2018 ◽  
Vol 19 (2) ◽  
pp. 43-53
Author(s):  
Majdee Tohtayong ◽  
Sheroz Khan ◽  
MASHKURI BIN YAACOB ◽  
Siti Hajar Yusoff ◽  
NUR SHAHIDA BINTI MIDI ◽  
...  

ABSTRACT: This paper presents simulation results of the influence of wide range modulation index values ( ) in carrier-based PWM strategy for application in generating the stepped waveform. The waveform is tested for application in single-phase half-bridge modular multilevel converters (MMCs) topology. The results presented in this paper include a variation of the fundamental component (50 Hz) in the voltage output.  It also studies total harmonic distortion of the output voltage (THDv) and the output current (THDi) when the modulation index is changed over the linear-modulation region, 0 < < 1. It also explores the effect of a modulation index greater than 1. Moreover, different output voltage shapes, as a consequence of varied  on MMCs, are also illustrated for showing the effect of varying the value of on sub-module of MMCs. ABSTRAK: Kajian ini berkenaan tentang pengaruh simulasi terhadap pelbagai nilai indeks ( ) berasaskan strategi PWM bagi menghasilkan bentuk gelombang bertingkat. Bentuk gelombang ini diuji untuk aplikasi topologi MMCs. Keputusan menunjukkan variasi pada komponen asas (50Hz) pada voltan akhir. Keputusan menunjukkan jumlah penyelarasan harmonik voltan akhir (THDv) dan arus (THDv) apabila indeks modulasi telah ditukar pada had modulasi linear, 0 < < 1. Ia juga membincangkan tentang kesan indeks modulasi lebih daripada 1. Selain itu, bentuk voltan akhir yang berbeza mengikut perubahan nilai   pada MMCs juga dilampirkan bagi menunjukkan kesan perbezaan nilai    pada sub-modul MMCs.


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