Low temperature low pressure solid-state porous Ag bonding for large area and its high-reliability design in die-attached power modules

2019 ◽  
Vol 45 (7) ◽  
pp. 9573-9579 ◽  
Author(s):  
Chuantong Chen ◽  
Dongjin Kim ◽  
Zhenghong Wang ◽  
Zheng Zhang ◽  
Yue Gao ◽  
...  
2007 ◽  
Vol 353-358 ◽  
pp. 2948-2953 ◽  
Author(s):  
Thomas G. Lei ◽  
Jesus Calata ◽  
Shu Fang Luo ◽  
Guo Quan Lu ◽  
Xu Chen

Today, reflow soldering is a commonly used technique to establish large-area joints in power electronics modules. These joints are needed to attach large-area (>1 cm2) power semiconductor chips to the substrate, e.g., a direct-bond copper substrate, and the multichip module substrate to a copper base plate for heat spreading. Thermal performance, specifically thermal conductivity and thermomechanical reliability, of these large-area joints are critical to the electrical performance and lifetime of the power modules. Soft solder alloys, including the lead-tin eutectic and lead-free alternatives, have low thermal conductivities and are highly susceptible to fatigue failure. As demands mount for higher power density, higher junction temperature, and longer lifetime out of the power modules, reliance on solder-based joining is becoming a barrier for further advancement in power electronics systems. Recently, we successfully demonstrated lowtemperature sintering of nanoscale silver paste as a lead-free solution for achieving highperformance, high-reliability, and high-temperature interconnection of small devices (<0.09 cm2). In this paper, we report the results of our study to extend the low-temperature sintering technique to large-area joints. The study involved redesigning the organic and inorganic components of the nanoscale silver paste, analyzing the burnout kinetics of the various organic species sandwiched between large-area plates, and developing desirable temperature-time profile to improve sintering and bonding strength of the joints.


2016 ◽  
Vol 2016 (DPC) ◽  
pp. 001918-001947 ◽  
Author(s):  
Lars Boettcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann

Packages and modules with embedded semiconductor dies are of interest for various application fields and power classes. First packages in the lower power range are available in volume production since almost six years. Recent developments focus on medium and higher power applications raging over 500W into the kW range. Different approaches are available to realize such packages and modules. This paper will give an overview and detailed description of the latest approaches for such embedded die structures. In common of all of these approaches, is the use of laminate based die embedding, which uses standard PCB manufacturing technologies. Main differences are the used base substrate, which can still be a ceramic (DBC), Cu leadframe or high current substrate. Examples for the different methods will be given. As the main part, this paper will describe concepts, which enable significant smaller form-factor of power electronics modules, thereby allowing for lower price, high reliability, capability of direct mounting on e.g. a motor so as to form one unit with the motor housing, wide switching frequency range (for large application field) and high power efficiency. The innovative character of this packaging concept is the idea to embed the power drive components (IGBTs, MOSFETs, diode) as thinned chips into epoxy-resin layer built-up and to realize large-area interconnections on both sides by direct copper plating the dies to form a conductor structure with lowest possible electrical impedance and to achieve an optimum heat removal. In this way a thin core is formed on a large panel format which is called Embedded Power Core. The paper will specifically highlight the first results on manufacturing an embedded power discrete package as an example of an embedded power core containing a thin rectifier diode. For module realization, the power cores are interconnected to insulated metal substrates (IMS) by the use of Ag sintering interconnection technologies for the final manufacturing of Power modules. The paper will elaborate on the sintering process for Power Core/IMS interconnections, the microscopically features of the sintered interfaces, and the lateral filling of the sintering gap with epoxy prepregs. Firstly, 500W power modules were manufactured using this approach. Reliability testing results, solder reflow testing, temperature cycling test and active power cycling, will be discussed in detail.


1977 ◽  
Vol 39 ◽  
pp. 537-539
Author(s):  
J. M. Herndon

The minerals of chondritic meteorites, particularly C2 and C3 are usually believed to be condensates of the (previously unfractionated) solar nebula. This implies two postulates: (1) that chemical reactions between phases ceased at various temperatures; (2) that Ni and Fe were mobilized by diffusion in the solid state. An alternate explanation is proposed, which obviates the two postulates: chondritic minerals may have condensed, in equilibrium with their own vapors, from a fraction already separated from the solar nebula at low temperature and low pressure.


2016 ◽  
Vol 13 (4) ◽  
pp. 169-175
Author(s):  
Sayan Seal ◽  
Michael D. Glover ◽  
H. Alan Mantooth

This article presents the plan and initial feasibility studies for an Integrated Wire Bond-less Power Module. Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices owing to the advent of wide bandgap semiconductors such as silicon carbide (SiC) and gallium nitride. SiC has capabilities of operating at much higher temperatures and faster switching speeds compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High-performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high-performance package of sufficient reliability. This article lays the foundation for an electronic package designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability. The interconnections between the gate drive circuitry and the power devices were implemented using a low temperature cofired ceramic interposer.


Author(s):  
Gert Ehrlich

The field ion microscope, devised by Erwin Muller in the 1950's, was the first instrument to depict the structure of surfaces in atomic detail. An FIM image of a (111) plane of tungsten (Fig.l) is typical of what can be done by this microscope: for this small plane, every atom, at a separation of 4.48Å from its neighbors in the plane, is revealed. The image of the plane is highly enlarged, as it is projected on a phosphor screen with a radius of curvature more than a million times that of the sample. Müller achieved the resolution necessary to reveal individual atoms by imaging with ions, accommodated to the object at a low temperature. The ions are created at the sample surface by ionization of an inert image gas (usually helium), present at a low pressure (< 1 mTorr). at fields on the order of 4V/Å.


1987 ◽  
Vol 48 (C6) ◽  
pp. C6-487-C6-492
Author(s):  
W. Liu ◽  
D. M. Ren ◽  
C. L. Bao ◽  
T. T. Tsong

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