Embedded Die Packages and Modules for Power Electronics Applications

2016 ◽  
Vol 2016 (DPC) ◽  
pp. 001918-001947 ◽  
Author(s):  
Lars Boettcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann

Packages and modules with embedded semiconductor dies are of interest for various application fields and power classes. First packages in the lower power range are available in volume production since almost six years. Recent developments focus on medium and higher power applications raging over 500W into the kW range. Different approaches are available to realize such packages and modules. This paper will give an overview and detailed description of the latest approaches for such embedded die structures. In common of all of these approaches, is the use of laminate based die embedding, which uses standard PCB manufacturing technologies. Main differences are the used base substrate, which can still be a ceramic (DBC), Cu leadframe or high current substrate. Examples for the different methods will be given. As the main part, this paper will describe concepts, which enable significant smaller form-factor of power electronics modules, thereby allowing for lower price, high reliability, capability of direct mounting on e.g. a motor so as to form one unit with the motor housing, wide switching frequency range (for large application field) and high power efficiency. The innovative character of this packaging concept is the idea to embed the power drive components (IGBTs, MOSFETs, diode) as thinned chips into epoxy-resin layer built-up and to realize large-area interconnections on both sides by direct copper plating the dies to form a conductor structure with lowest possible electrical impedance and to achieve an optimum heat removal. In this way a thin core is formed on a large panel format which is called Embedded Power Core. The paper will specifically highlight the first results on manufacturing an embedded power discrete package as an example of an embedded power core containing a thin rectifier diode. For module realization, the power cores are interconnected to insulated metal substrates (IMS) by the use of Ag sintering interconnection technologies for the final manufacturing of Power modules. The paper will elaborate on the sintering process for Power Core/IMS interconnections, the microscopically features of the sintered interfaces, and the lateral filling of the sintering gap with epoxy prepregs. Firstly, 500W power modules were manufactured using this approach. Reliability testing results, solder reflow testing, temperature cycling test and active power cycling, will be discussed in detail.

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 000906-000937 ◽  
Author(s):  
Lars Boettcher ◽  
Lars Boettcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann

Power electronics packaging applications has strong demands regarding reliability and cost. The fields of developments reach from low power converter modules, over single or multichip MOSFET or IGBT packages, up to high power applications, like needed e.g. for solar inverters and automotive applications. This paper will give an overview about these applications and a description of each ones demand. The spectrum of conventional power electronics packaging reaches from SMD packages for power chips to large power modules. In most of these packages the power semiconductors are connected by bond wires, resulting in large resistances and parasitic inductance. Additionally bond wires result in a high stray inductance which limits the switching frequency. The embedding of chips using Printed Circuit Board (PCB) technology offers a solution for many of the problems in power packaging. This paper will show today's available power packages and power modules, realized in industrial production as well as in European research projects. All technologies which are used are based on PCB materials and processes. Chips are mounted to Cu foils, lead frames, high power PCBs or even ceramic substrates, embedded by vacuum lamination of laminate sheets and electrically connected by laser drilling and Cu plating. A new approach for embedded power modules will be presented in detail. In this project, different application fields are covered, ranging from 50 W over 500 W to 50kW power modules for different applications like single chip packages, over power control units for pedelec (Pedal Electric Cycle), to inverter modules for automotive applications. This approach will focus on a power core base structure for the embedded semiconductor, which is then connected to a high power PCB. The connection to the embedded die is realized by direct copper connection only. The technology principle will be described in detail. Frist manufactured demonstrators will be presented. The presented new approach for the realization of a power core structure offers new possibilities for the module manufacturing, avoiding soldering or Ag sintering of the power semiconductors and the handling of thick copper substrates during the embedding process.


2007 ◽  
Vol 353-358 ◽  
pp. 2948-2953 ◽  
Author(s):  
Thomas G. Lei ◽  
Jesus Calata ◽  
Shu Fang Luo ◽  
Guo Quan Lu ◽  
Xu Chen

Today, reflow soldering is a commonly used technique to establish large-area joints in power electronics modules. These joints are needed to attach large-area (>1 cm2) power semiconductor chips to the substrate, e.g., a direct-bond copper substrate, and the multichip module substrate to a copper base plate for heat spreading. Thermal performance, specifically thermal conductivity and thermomechanical reliability, of these large-area joints are critical to the electrical performance and lifetime of the power modules. Soft solder alloys, including the lead-tin eutectic and lead-free alternatives, have low thermal conductivities and are highly susceptible to fatigue failure. As demands mount for higher power density, higher junction temperature, and longer lifetime out of the power modules, reliance on solder-based joining is becoming a barrier for further advancement in power electronics systems. Recently, we successfully demonstrated lowtemperature sintering of nanoscale silver paste as a lead-free solution for achieving highperformance, high-reliability, and high-temperature interconnection of small devices (<0.09 cm2). In this paper, we report the results of our study to extend the low-temperature sintering technique to large-area joints. The study involved redesigning the organic and inorganic components of the nanoscale silver paste, analyzing the burnout kinetics of the various organic species sandwiched between large-area plates, and developing desirable temperature-time profile to improve sintering and bonding strength of the joints.


2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000190-000197 ◽  
Author(s):  
D. J. DeVoto ◽  
P. P. Paret ◽  
A. A. Wereszczak

In automotive power electronics packages, conventional thermal interface materials such as greases, gels, and phase-change materials pose bottlenecks to heat removal and are also associated with reliability concerns. The industry trend is toward high thermal performance bonded interfaces for large-area attachments. However, because of coefficient of thermal expansion mismatches between materials/layers and resultant thermomechanical stresses, adhesive and cohesive fractures could occur, posing a reliability problem. These defects manifest themselves in increased thermal resistance. This research aims to investigate and improve the thermal performance and reliability of sintered-silver for power electronics packaging applications. This has been experimentally accomplished by the synthesis of large-area bonded interfaces between metalized substrates and copper base plates that have subsequently been subjected to thermal cycles. A finite element model of crack initiation and propagation in these bonded interfaces will allow for the interpretation of degradation rates by a crack-velocity (V)-stress intensity factor (K) analysis. A description of the experiment and the modeling approach are discussed.


Author(s):  
Sreekant Narumanchi ◽  
Douglas DeVoto ◽  
Mark Mihalic ◽  
Tim Popp ◽  
Patrick McCluskey

In automotive power electronics packages (e.g., insulated gate bipolar transistor [IGBT] packages), conventional polymeric thermal interface materials (TIMs) such as greases, gels, and phase-change materials pose a bottleneck to heat removal and are also associated with reliability concerns. High thermal performance bonded interfaces have become an industry trend. However, due to mismatches in the coefficient of thermal expansion between materials/layers and the resultant thermomechanical stresses, there could be voids and crack formations in these bonded interfaces as well as delaminations, which pose a problem from a reliability standpoint. These defects manifest themselves in increased thermal resistance in the package, which acts as a bottleneck to heat removal from the package. Hence, the objective of this research is to investigate and improve the thermal performance and reliability of novel bonded interface materials for power electronics packaging applications. Thermal performance and reliability of bonds/joints is presented for bonds based on a thermoplastic (polyamide) adhesive with embedded micron-sized carbon fibers, sintered silver (Ag), and conventional lead (Pb)-based solder materials. These materials form a bond between 50.8 mm × 50.8 mm footprint direct-bond-copper (DBC) substrate and copper (Cu) base plate samples. Samples undergo thermal cycling (−40°C to 150°C) for up to 2,000 cycles as an upper limit. Damage occurrence is monitored every 100 temperature cycles by several non-destructive techniques, including steady-state thermal resistance measurement, acoustic microscopy, and high-voltage potential testing. This yields a consistent story on the thermal performance and reliability of large-area joints under accelerated stress conditions.


2019 ◽  
Vol 45 (7) ◽  
pp. 9573-9579 ◽  
Author(s):  
Chuantong Chen ◽  
Dongjin Kim ◽  
Zhenghong Wang ◽  
Zheng Zhang ◽  
Yue Gao ◽  
...  

Author(s):  
Patrick McCluskey ◽  
Peter Hansen ◽  
Douglas DeVoto

Power electronics are used to minimize losses in converting the energy produced by the generator in a wind turbine, and to drive motors that control the pitch and yaw of the wind turbine to ensure maximum power extraction. The power electronic system is based on a series of three-phase pulse width modulated (PWM) power modules consisting of IGBT power switches and associated diodes that are soldered to a ceramic substrate and interconnected with wirebonds. The design of the packaging and cooling of the power electronics is crucial to enhancing the energy efficiency and the reliability of the electronics, which generate heat loads in the hundreds of watts/cm2, and are often placed in harsh and inaccessible offshore environments. Without adequate heat removal, the increase in device temperature will reduce the efficiency of power electronic devices leading to thermal runaway and eventual failure of the entire power electronic system. Furthermore, the increased temperatures can lead to failure of the packaging elements as well. This paper will provide an overview of the fundamental packaging level mechanisms that can cause failures in the power electronic system. These include wirebond and lead fatigue, die attach fatigue, substrate cracking, and lead bonding fatigue.


Author(s):  
Ramesh Varma ◽  
Richard Brooks ◽  
Ronald Twist ◽  
James Arnold ◽  
Cleston Messick

Abstract In a prequalification effort to evaluate the assembly process for the industrial grade high pin count devices for use in a high reliability application, one device exhibited characteristics that, without corrective actions and/or extensive screening, may lead to intermittent system failures and unacceptable reliability. Five methodologies confirmed this conclusion: (1) low post-decapsulation wire pull results; (2) bond shape analysis showed process variation; (3) Failure Analysis (FA) using state of the art equipment determined the root causes and verified the low wire pull results; (4) temperature cycling parts while monitoring, showed intermittent failures, and (5) parts tested from other vendors using the same techniques passed all limits.


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