Design of sub-threshold current memory circuit for low power ADC

2015 ◽  
Vol 48 ◽  
pp. 308-312
Author(s):  
Sung-Dae Yeo ◽  
Young-Jin Jang ◽  
Kyung-Ryang Lee ◽  
Seong-Kweon Kim
Keyword(s):  
Low Power ◽  
Threshold Current ◽  
Memory Circuit

scholarly journals Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory Circuit

2015 ◽  
Vol 12 (2) ◽  
pp. 1-18
Author(s):  
Santosh Khasanvis ◽  
K. M. Masum Habib ◽  
Mostafizur Rahman ◽  
Roger Lake ◽  
Csaba Andras Moritz
Keyword(s):  
Low Power ◽  
Graphene Nanoribbon ◽  
Memory Circuit ◽  
Volatile Memory

22.4: Invited Paper: Ultra-Low-Power LTPS TFT-LCD Technology Using a Multi-Bit Pixel Memory Circuit

2006 ◽  
Vol 37 (1) ◽  
pp. 1185 ◽  
Author(s):  
Yoshiharu Nakajima ◽  
Yasuyuki Teranishi ◽  
Yoshitoshi Kida ◽  
Yasuhito Maki
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Memory Circuit

Ultra-low-power LTPS TFT-LCD technology using a multi-bit pixel memory circuit

2006 ◽  
Vol 14 (12) ◽  
pp. 1071 ◽  
Author(s):  
Yoshiharu Nakajima ◽  
Yasuyuki Teranishi ◽  
Yoshitoshi Kida ◽  
Yasuhito Maki
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Memory Circuit

Experimental study on the mechanism governing spectral shifts in low power 670 nm AlGaInP multiple quantum well (MQW) laser diodes over temperature range 5–45 °C

2016 ◽  
Vol 94 (7) ◽  
pp. 640-644 ◽  
Author(s):  
Santosh Chackrabarti ◽  
Dhrub Sharma ◽  
Shereena Joseph ◽  
Tho-alfiqar A. Zaker ◽  
A.K. Hafiz ◽  
...  
Keyword(s):  
Quantum Well ◽  
Low Power ◽  
Band Gap ◽  
Characteristic Temperature ◽  
Multiple Quantum Well ◽  
Laser Diodes ◽  
Threshold Current ◽  
Multiple Quantum ◽  
Spectral Shifts ◽  
Band Gap Narrowing

We report on the temperature-dependent spectral shifts in low power 670 nm AlGaInP multiple quantum well red laser diodes due to band gap narrowing at room temperatures (5–45 °C). The spectral shift mechanism is explored with a threshold current density of 11.41 kA/cm2 and a good characteristic temperature of 114 K. The photoluminescence peak intensity shifts towards higher wavelengths and the full width at half maximum increases with increase in temperature from 5 to 45 °C. We use a Hamiltonian system considering the effective mass approximation to formulate the carrier concentrations. The band gap narrowing value determined by a simple formula amounts to 59.15 meV and displays N1/3 dependence at higher densities. The carrier density dependence conveys that the redshift of the spectral emission is due to band gap narrowing.

Subthreshold Current Modeling of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctioless MOSFET For Low Power Applications

2021 ◽  
Author(s):  
Prashant Kumar ◽  
Munish Vashisht ◽  
Neeraj Gupta ◽  
Rashmi Gupta
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
Future Generation ◽  
Threshold Current ◽  
Cmos Inverter ◽  
Drive Current ◽  
Subthreshold Current ◽  
Pmos Transistor ◽  
Good Agreement ◽  
The Ideal

Abstract Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctioless MOSFET has been explored for low power applications. This paper presents an analytical model of subthreshold current of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctioless MOSFET. The analytical results were compared with TMSG MOSFET and good agreement was obtained. The sub-threshold current of the device is very low and consider for the implementation of CMOS inverter. A PMOS transistor is designed and the drive current of the PMOS transistor is tuned with the NMOS device to obtain the ideal matching in the drive current. A CMOS inverter has been designed. The transient and DC behavior of the device have been examined. The power dissipation of the CMOS inverter has been computed and compared with CMOS DMG-SOI JLT inverter. The power dissipation is 5 times less in proposed device as compared to CMOS DMG-SOI JLT inverter. This exhibits an excellent improvement in power dissipation which is useful for making low power future generation devices.

scholarly journals Ultra-Low Power Memory Circuit Unit for Space Application

2021 ◽  
Vol 1084 (1) ◽  
pp. 012059
Author(s):  
S.P. Karthi ◽  
K. Kavitha ◽  
Ganesh Babu ◽  
J R Dinesh Kumar ◽  
C Visvesvaran ◽  
...  
Keyword(s):  
Low Power ◽  
Space Application ◽  
Ultra Low Power ◽  
Memory Circuit

A Novel Method to Control Leakage and Noise in Domino Circuit for Wide Fan-in OR Logic

2021 ◽  
pp. 2250055
Author(s):  
Ankur Kumar ◽  
R. K. Nagaria
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
Noise Immunity ◽  
Cmos Technology ◽  
Threshold Current ◽  
Delay Condition ◽  
Noise Margin ◽  
Novel Method ◽  
Domino Circuits

This paper proposes a novel method to control leakage and noise in domino circuits for wide fan-in OR logic with low power consumption, low process variation, and higher noise margin under the similar delay condition. In the proposed method, output and dynamic nodes are isolated from the PDN (Pull-Down Network) to improve the noise immunity and reduce switching activity. Further, with the aid of a transistor in the stack, the sub-threshold current is reduced. Thus, the proposed domino is applicable for high-speed and low-power applications in deep sub-micro-range. Simulation results show that the proposed domino improves the noise immunity and figure of merit (FOM) by factors of 1.95 and 2.34, respectively, with respect to the conventional domino with a footer. Along with this improvement, 26% reduction is also observed in power consumption. The entire simulations for all the domino circuits are done at 45-nm CMOS technology by using SPECTRE simulator under the Cadence Virtuoso environment.

P-40: Design of Analog Pixel Memory Circuit with Low Temperature Polycrystalline Silicon TFTs for Low Power Application

2010 ◽  
Vol 41 (1) ◽  
pp. 1363 ◽  
Author(s):  
Li-Wei Chu ◽  
Po-Tsun Liu ◽  
Ming-Dou Ker ◽  
Guang-Ting Zheng ◽  
Yu-Hsuan Li ◽  
...  
Keyword(s):  
Low Temperature ◽  
Low Power ◽  
Polycrystalline Silicon ◽  
Memory Circuit ◽  
Power Application
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