scholarly journals A review on recent developments of thermoelectric materials for room-temperature applications

2020 ◽  
Vol 37 ◽  
pp. 100604 ◽  
Author(s):  
Zohreh Soleimani ◽  
Stamatis Zoras ◽  
Boris Ceranic ◽  
Sally Shahzad ◽  
Yuanlong Cui
2012 ◽  
Vol 717-720 ◽  
pp. 1059-1064 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Lin Cheng ◽  
Sarit Dhar ◽  
Craig Capell ◽  
Charlotte Jonas ◽  
...  

We present our recent developments in 4H-SiC power DMOSFETs. 4H-SiC DMOSFETs with a room temperature specific on-resistance of 3.7 mΩ-cm2 with a gate bias of 20 V, and an avalanche voltage of 1550 V with gate shorted to source, was demonstrated. A threshold voltage of 3.5 V was extracted from the power DMOSFET, and a subthreshold swing of 200 mV/dec was measured. The device was successfully scaled to an active area of 0.4 cm2, and the resulting device showed a drain current of 377 A at a forward voltage drop of 3.8 V at 25oC.


2012 ◽  
Vol 11 (04) ◽  
pp. 1240024 ◽  
Author(s):  
N. JOUVET ◽  
M. A. BOUNOUAR ◽  
S. ECOFFEY ◽  
C. NAUENHEIM ◽  
A. BEAUMONT ◽  
...  

This work presents a nanodamascene process for a CMOS back-end-of-line fabrication of metallic single electron transistor(SET), together with the use of simulation tools for the development of a SET SRAM memory cell. We show room temperature electrical characterizations of SETs fabricated on CMOS with relaxed dimensions, and simulations of a SET SRAM memory cell. Using their physical characteristics achievable through the use of atomic layer deposition, it will be demonstrated that it has the potential to operate at temperature up to 398 K, and that power consumption is less than that of equivalent circuit in advanced CMOS technologies. In order to take advantage of both low power SETs and high CMOS drive efficiency, a hybrid 3D SET CMOS circuit is proposed.


Energies ◽  
2020 ◽  
Vol 13 (17) ◽  
pp. 4524
Author(s):  
Amin Nozariasbmarz ◽  
Daryoosh Vashaee

Depending on the application of bismuth telluride thermoelectric materials in cooling, waste heat recovery, or wearable electronics, their material properties, and geometrical dimensions should be designed to optimize their performance. Recently, thermoelectric materials have gained a lot of interest in wearable electronic devices for body heat harvesting and cooling purposes. For efficient wearable electronic devices, thermoelectric materials with optimum properties, i.e., low thermal conductivity, high Seebeck coefficient, and high thermoelectric figure-of-merit (zT) at room temperature, are demanded. In this paper, we investigate the effect of glass inclusion, microwave processing, and annealing on the synthesis of high-performance p-type (BixSb1−x)2Te3 nanocomposites, optimized specially for body heat harvesting and body cooling applications. Our results show that glass inclusion could enhance the room temperature Seebeck coefficient by more than 10% while maintaining zT the same. Moreover, the combination of microwave radiation and post-annealing enables a 25% enhancement of zT at room temperature. A thermoelectric generator wristband, made of the developed materials, generates 300 μW power and 323 mV voltage when connected to the human body. Consequently, MW processing provides a new and effective way of synthesizing p-type (BixSb1−x)2Te3 alloys with optimum transport properties.


Metals ◽  
2018 ◽  
Vol 8 (11) ◽  
pp. 935 ◽  
Author(s):  
Maryana Asaad ◽  
Jim Buckman ◽  
Jan-Willem Bos

Half-Heuslers (HHs) are promising thermoelectric materials with great compositional flexibility. Here, we extend work on the p-type doping of TiCoSb using abundant elements. Ti0.7V0.3Co0.85Fe0.15Sb0.7Sn0.3 samples with nominal 17.85 p-type electron count were investigated. Samples prepared using powder metallurgy have negative Seebeck values, S ≤ −120 µV K−1, while arc-melted compositions are compensated semiconductors with S = −45 to +30 µV K−1. The difference in thermoelectric response is caused by variations in the degree of segregation of V(Co0.6Fe0.4)2Sn full-Heusler and Sn phases, which selectively absorb V, Fe, and Sn. The segregated microstructure leads to reduced lattice thermal conductivities, κlat = 4.5−7 W m−1 K−1 near room temperature. The largest power factor, S2/ρ = 0.4 mW m−1 K−2 and ZT = 0.06, is observed for the n-type samples at 800 K. This works extends knowledge regarding suitable p-type dopants for TiCoSb.


2020 ◽  
Vol 8 (40) ◽  
pp. 14037-14048
Author(s):  
Pavan Kumar-Ventrapati ◽  
Shantanu Misra ◽  
Gaëlle Delaizir ◽  
Anne Dauscher ◽  
Bertrand Lenoir ◽  
...  

The n-type chalcogenide Bi8Se7 is the parent compound of a new class of highly-efficient thermoelectric materials for near-room-temperature thermoelectric applications.


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