Analytical model for an asymmetric double-gate MOSFET with gate-oxide thickness and flat-band voltage variations in the subthreshold region

2016 ◽  
Vol 120 ◽  
pp. 19-24 ◽  
Author(s):  
Yong Hyeon Shin ◽  
Ilgu Yun
2012 ◽  
Vol 59 (4) ◽  
pp. 1002-1007 ◽  
Author(s):  
Srivatsava Jandhyala ◽  
Rutwick Kashyap ◽  
Costin Anghel ◽  
Santanu Mahapatra

Author(s):  
Hakkee Jung

Threshold voltage roll-off is analyzed for sub-10 nm asymmetric double gate (DG) MOSFET. Even asymmetric DGMOSFET will increase threshold voltage roll-off in sub-10 nm channel length because of short channel effects due to the increase of tunneling current, and this is an obstacle against the miniaturization of asymmetric DGMOSFET. Since asymmetric DGMOSFET can be produced differently in top and bottom oxide thickness, top and bottom oxide thicknesses will affect the threshold voltage roll-off. To analyze this, <em>thermal</em><em> </em>emission current and tunneling current have been calculated, and threshold voltage roll-off by the reduction of channel length has been analyzed by using channel thickness and top/bottom oxide thickness as parameters. As a result, it is found that, in short channel asymmetric double gate MOSFET, threshold voltage roll-off is changed greatly according to top/bottom gate oxide thickness, and that threshold voltage roll-off is more influenced by silicon thickness. In addition, it is found that top and bottom oxide thickness have a relation of inverse proportion mutually for maintaining identical threshold voltage. Therefore, it is possible to reduce the leakage current of the top gate related with threshold voltage by increasing the thickness of the top gate oxide while maintaining the same threshold voltage.


Sign in / Sign up

Export Citation Format

Share Document