A novel thin-film transistor with step gate-overlapped lightly doped drain and raised source/drain design

2017 ◽  
Vol 137 ◽  
pp. 10-15
Author(s):  
Feng-Tso Chien ◽  
Jian-Liang Chen ◽  
Chien-Ming Chen ◽  
Chii-Wen Chen ◽  
Ching-Hwa Cheng ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistor ◽  
Lightly Doped Drain

scholarly journals Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor

Coatings ◽  
2019 ◽  
Vol 9 (4) ◽  
pp. 233 ◽  
Author(s):  
Feng-Tso Chien ◽  
Chih-Ping Hung ◽  
Hsien-Chin Chiu ◽  
Tsung-Kuei Kang ◽  
Ching-Hwa Cheng ◽  
...  
Keyword(s):  
Thin Film ◽  
Electric Field ◽  
Stress Test ◽  
Thin Film Transistor ◽  
Double Gate ◽  
Silicon Thin Film ◽  
Hot Carrier ◽  
Single Top ◽  
Lightly Doped Drain ◽  
A Current

A current improved and electric field reduced double-gate (DG) polycrystalline silicon thin-film transistor with two-step source/drain (DGTSD-TFT) design is proposed and demonstrated in this study. The two-step source/drain (TSD) design, which consists of a raised source/drain (RSD) area together with a partial gate overlapped lightly doped drain (P-GOLDD) structure, can lower the device drain electric field (DEF) to reveal a better device performance. Comparisons have been made with respect to a traditional single top gate (STG) device. The operation current of the proposed DGTSD-TFT is almost twice as large as that of the STG structure. The OFF-state leakage current and kink effect, as well as the ON/OFF current ratio for this double-gate and two-step source/drain structure, are also improved simultaneously because of a reduced DEF. A hot carrier stress test reveals that that two-step source/drain structure can achieve more stable device characteristics than the traditional device.

Novel Fabrication of Lightly Doped-Drain for Suppressing the Leakage Current in Polycrystalline Silicon Thin-Film Transistor

2017 ◽  
Vol 17 (5) ◽  
pp. 3465-3468
Author(s):  
Hyung Yoon Kim ◽  
Ki Hwan Seok ◽  
Zohreh Kiaee ◽  
Hee Jae Chae ◽  
Sol Kyu Lee ◽  
...  
Keyword(s):  
Thin Film ◽  
Leakage Current ◽  
Polycrystalline Silicon ◽  
Thin Film Transistor ◽  
Silicon Thin Film ◽  
Lightly Doped Drain

Polysilicon High-Voltage TFT with Field-Plate-Controlled Offset Region

1990 ◽  
Vol 182 ◽  
Author(s):  
T. Y. Huang ◽  
I. W. Wu ◽  
A. G. Lewis ◽  
A. Chiang ◽  
R. H. Bruce
Keyword(s):  
Thin Film ◽  
Electric Field ◽  
Ion Implantation ◽  
High Voltage ◽  
Thin Film Transistor ◽  
Large Area ◽  
Process Flow ◽  
Field Plate ◽  
Turn On ◽  
Lightly Doped Drain

AbstractAn improved polysilicon high voltage thin film transistor (HVTFT) structure with field-plate-controlled offset region (FP-HVTFT) is proposed for eliminating the current-pinching phenomena often observed in the conventional offset-gate polysilicon HVTFTs. The new metal field plate serves, in lieu of ion implantation, to control the conductivity of the offset region. By properly biasing the field plate to distribute the drain electric field at both ends of the offset region, high-voltage operation of up to 100 V, suitable for many large-area applications, is achieved. Good turn-on characteristics without current-pinching effects are consistently obtained. Moreover, the new FP-HVTFT also eliminates the lightly-doped-drain implant normally required in conventional offset-gate HVTFTs, resulting in a simpler and more reproducible process flow.

scholarly journals A novel lightly doped drain polysilicon thin-film transistor with oxide sidewall spacer formed by one-step selective liquid phase deposition

1999 ◽  
Vol 20 (8) ◽  
pp. 421-423 ◽  
Author(s):  
Po-Sheng Shih ◽  
Chun-Yen Chang ◽  
Ting-Chang Chang ◽  
Tiao-Yuan Huang ◽  
Du-Zen Peng ◽  
...  
Keyword(s):  
Thin Film ◽  
Liquid Phase ◽  
Thin Film Transistor ◽  
Liquid Phase Deposition ◽  
One Step ◽  
Lightly Doped Drain

scholarly journals Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor

Membranes ◽  
2021 ◽  
Vol 11 (2) ◽  
pp. 103
Author(s):  
Feng-Tso Chien ◽  
Jing Ye ◽  
Wei-Cheng Yen ◽  
Chii-Wen Chen ◽  
Cheng-Li Lin ◽  
...  
Keyword(s):  
Thin Film ◽  
Electric Field ◽  
Electric Fields ◽  
Systems Engineering ◽  
Impact Ionization ◽  
Thin Film Transistor ◽  
Ionization Rate ◽  
Drain Side ◽  
Output Characteristics ◽  
Lightly Doped Drain

The raised source/drain (RSD) structure is one of thin film transistor designs that is often used to improve device characteristics. Many studies have mentioned that the high impact ionization rate occurring at a drain side can be reduced, owing to a raised source/drain area that can disperse the drain electric field. In this study, we will discuss how the electric field at the drain side of an RSD device is reduced by a vertical lightly doped drain (LDD) scheme rather than a RSD structure. We used different raised source/drain forms to simulate the drain side electric field for each device, as well as their output characteristics, using Integrated Systems Engineering (ISE-TCAD) simulators. Different source and drain thicknesses and doping profiles were applied to verify the RSD mechanism. We found that the electric fields of a traditional device and uniform doping RSD structures are almost the same (~2.9 × 105 V/cm). The maximum drain electric field could be reduced to ~2 × 105 V/cm if a vertical lightly doped drain RSD scheme was adopted. A pure raised source/drain structure did not benefit the device characteristics if a vertical lightly doped drain design was not included in the raised source/drain areas.

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