Polysilicon High-Voltage TFT with Field-Plate-Controlled Offset Region

AbstractAn improved polysilicon high voltage thin film transistor (HVTFT) structure with field-plate-controlled offset region (FP-HVTFT) is proposed for eliminating the current-pinching phenomena often observed in the conventional offset-gate polysilicon HVTFTs. The new metal field plate serves, in lieu of ion implantation, to control the conductivity of the offset region. By properly biasing the field plate to distribute the drain electric field at both ends of the offset region, high-voltage operation of up to 100 V, suitable for many large-area applications, is achieved. Good turn-on characteristics without current-pinching effects are consistently obtained. Moreover, the new FP-HVTFT also eliminates the lightly-doped-drain implant normally required in conventional offset-gate HVTFTs, resulting in a simpler and more reproducible process flow.

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A Low Impact Ionization Rate Poly-Si TFT with a Current and Electric Field Split Design

Coatings ◽

10.3390/coatings9080514 ◽

2019 ◽

Vol 9 (8) ◽

pp. 514 ◽

Cited By ~ 2

Author(s):

Feng-Tso Chien ◽

Kuang-Po Hsueh ◽

Zhen-Jie Hong ◽

Kuan-Ting Lin ◽

Yao-Tsung Tsai ◽

...

Keyword(s):

Thin Film ◽

Electric Field ◽

Impact Ionization ◽

Thin Film Transistor ◽

Ionization Rate ◽

Field Plate ◽

Current Path ◽

Plate Design ◽

Impact Ionization Rate ◽

A Current

In this study, a novel low impact ionization rate (low-IIR) poly-Si thin film transistor featuring a current and electric field split (CES) structure with bottom field plate (BFP) and partial thicker channel raised source/drain (RSD) designs is proposed and demonstrated. The bottom field plate design can allure the electron and alter the electron current path to evade the high electric field area and therefore reduce the device IIR and suppress the kink effect. A two-dimensional device simulator was applied to describe and compare the current path, electric field magnitude distributions, and IIR of the proposed structure and conventional devices. In addition, the advantages of a partial thicker channel RSD design are present, and the leakage current of CES-thin-film transistor (TFT) can be reduced and the ON/OFF current ratio be improved, owing to a smaller drain electric field.

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Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor

Coatings ◽

10.3390/coatings9040233 ◽

2019 ◽

Vol 9 (4) ◽

pp. 233 ◽

Cited By ~ 1

Author(s):

Feng-Tso Chien ◽

Chih-Ping Hung ◽

Hsien-Chin Chiu ◽

Tsung-Kuei Kang ◽

Ching-Hwa Cheng ◽

...

Keyword(s):

Thin Film ◽

Electric Field ◽

Stress Test ◽

Thin Film Transistor ◽

Double Gate ◽

Silicon Thin Film ◽

Hot Carrier ◽

Single Top ◽

Lightly Doped Drain ◽

A Current

A current improved and electric field reduced double-gate (DG) polycrystalline silicon thin-film transistor with two-step source/drain (DGTSD-TFT) design is proposed and demonstrated in this study. The two-step source/drain (TSD) design, which consists of a raised source/drain (RSD) area together with a partial gate overlapped lightly doped drain (P-GOLDD) structure, can lower the device drain electric field (DEF) to reveal a better device performance. Comparisons have been made with respect to a traditional single top gate (STG) device. The operation current of the proposed DGTSD-TFT is almost twice as large as that of the STG structure. The OFF-state leakage current and kink effect, as well as the ON/OFF current ratio for this double-gate and two-step source/drain structure, are also improved simultaneously because of a reduced DEF. A hot carrier stress test reveals that that two-step source/drain structure can achieve more stable device characteristics than the traditional device.

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A novel hybrid gate-all-around high voltage thin film transistor with T-shaped metal field plate

2014 Silicon Nanoelectronics Workshop (SNW) ◽

10.1109/snw.2014.7348574 ◽

2014 ◽

Author(s):

Jhen-Yu Tsai ◽

Hsin-Hui Hu ◽

Yung-Chun Wu

Keyword(s):

Thin Film ◽

High Voltage ◽

Thin Film Transistor ◽

Field Plate

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Stepped Gate Polysilicon Thin-Film Transistor for Large Area Power Applications

MRS Proceedings ◽

10.1557/proc-508-25 ◽

1998 ◽

Vol 508 ◽

Author(s):

J. Aschenbeck ◽

Y. Chen ◽

F. Clough ◽

Y. Z. Xu ◽

E. M. Sankara Narayanan ◽

...

Keyword(s):

Thin Film ◽

Density Of States ◽

Low Voltage ◽

Thin Film Transistor ◽

Device Performance ◽

Two Dimensional ◽

Large Area ◽

Switching Speed ◽

Field Plate ◽

First Time

AbstractFor the first time, we report a new poly-Si stepped gate Thin Film Transistor (SG TFT) on glass. The Density of States extracted from measured I-V characteristics has been used to evaluate the device performance with a two dimensional device simulator. The results show that the three-terminal SG TFT device has a switching speed comparable to a low voltage structure and the high on-current capability of a metal field plate (MFP) TFT and the potential for comparable breakdown characteristics.

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Novel Gate-All-Around High-Voltage Thin-Film Transistor With T-Shaped Metal Field Plate Design

IEEE Transactions on Electron Devices ◽

10.1109/ted.2015.2395878 ◽

2015 ◽

Vol 62 (3) ◽

pp. 882-887 ◽

Cited By ~ 2

Author(s):

Jhen-Yu Tsai ◽

Hsin-Hui Hu

Keyword(s):

Thin Film ◽

High Voltage ◽

Thin Film Transistor ◽

Field Plate ◽

Plate Design

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Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor

Membranes ◽

10.3390/membranes11020103 ◽

2021 ◽

Vol 11 (2) ◽

pp. 103

Author(s):

Feng-Tso Chien ◽

Jing Ye ◽

Wei-Cheng Yen ◽

Chii-Wen Chen ◽

Cheng-Li Lin ◽

...

Keyword(s):

Thin Film ◽

Electric Field ◽

Electric Fields ◽

Systems Engineering ◽

Impact Ionization ◽

Thin Film Transistor ◽

Ionization Rate ◽

Drain Side ◽

Output Characteristics ◽

Lightly Doped Drain

The raised source/drain (RSD) structure is one of thin film transistor designs that is often used to improve device characteristics. Many studies have mentioned that the high impact ionization rate occurring at a drain side can be reduced, owing to a raised source/drain area that can disperse the drain electric field. In this study, we will discuss how the electric field at the drain side of an RSD device is reduced by a vertical lightly doped drain (LDD) scheme rather than a RSD structure. We used different raised source/drain forms to simulate the drain side electric field for each device, as well as their output characteristics, using Integrated Systems Engineering (ISE-TCAD) simulators. Different source and drain thicknesses and doping profiles were applied to verify the RSD mechanism. We found that the electric fields of a traditional device and uniform doping RSD structures are almost the same (~2.9 × 105 V/cm). The maximum drain electric field could be reduced to ~2 × 105 V/cm if a vertical lightly doped drain RSD scheme was adopted. A pure raised source/drain structure did not benefit the device characteristics if a vertical lightly doped drain design was not included in the raised source/drain areas.

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Polycrystalline silicon thin film transistor incorporating a semi-insulating field plate for high voltage circuitry on glass

Applied Physics Letters ◽

10.1063/1.119768 ◽

1997 ◽

Vol 71 (14) ◽

pp. 2002-2004 ◽

Cited By ~ 11

Author(s):

F. J. Clough ◽

E. M. Sankara Narayanan ◽

Y. Chen ◽

W. Eccleston ◽

W. I. Milne

Keyword(s):

Thin Film ◽

High Voltage ◽

Polycrystalline Silicon ◽

Thin Film Transistor ◽

Silicon Thin Film ◽

Field Plate

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Stepped Gate Polysilicon Thin Film Transistor for Large Area Power Applications

MRS Proceedings ◽

10.1557/proc-507-25 ◽

1998 ◽

Vol 507 ◽

Author(s):

J. Aschenbeck ◽

Y. Chen ◽

F. Clough ◽

Y. Z. Xu ◽

E. M. Sankara Narayanan ◽

...

Keyword(s):

Thin Film ◽

Density Of States ◽

Low Voltage ◽

Thin Film Transistor ◽

Device Performance ◽

Two Dimensional ◽

Large Area ◽

Switching Speed ◽

Field Plate ◽

First Time

ABSTRACTFor the first time, we report a new poly-Si stepped gate Thin Film Transistor (SG TFT) on glass. The Density of States extracted from measured I-V characteristics has been used to evaluate the device performance with a two dimensional device simulator. The results show that the three-terminal SG TFT device has a switching speed comparable to a low voltage structure and the high on-current capability of a metal field plate (MFP) TFT and the potential for comparable breakdown characteristics.

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