scholarly journals Three-Dimensional Nanoscale Mapping of State-of-the-Art Field-Effect Transistors (FinFETs)

2017 ◽  
Vol 23 (5) ◽  
pp. 916-925
Author(s):  
Pritesh Parikh ◽  
Corey Senowitz ◽  
Don Lyons ◽  
Isabelle Martin ◽  
Ty J. Prosa ◽  
...  
Keyword(s):  
Field Effect ◽  
Focused Ion Beam ◽  
Field Effect Transistors ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Three Dimensional ◽  
Atom Probe ◽  
Physical Structure ◽  
Oxide Semiconductor ◽  
Device Performance

AbstractThe semiconductor industry has seen tremendous progress over the last few decades with continuous reduction in transistor size to improve device performance. Miniaturization of devices has led to changes in the dopants and dielectric layers incorporated. As the gradual shift from two-dimensional metal-oxide semiconductor field-effect transistor to three-dimensional (3D) field-effect transistors (finFETs) occurred, it has become imperative to understand compositional variability with nanoscale spatial resolution. Compositional changes can affect device performance primarily through fluctuations in threshold voltage and channel current density. Traditional techniques such as scanning electron microscope and focused ion beam no longer provide the required resolution to probe the physical structure and chemical composition of individual fins. Hence advanced multimodal characterization approaches are required to better understand electronic devices. Herein, we report the study of 14 nm commercial finFETs using atom probe tomography (APT) and scanning transmission electron microscopy–energy-dispersive X-ray spectroscopy (STEM-EDS). Complimentary compositional maps were obtained using both techniques with analysis of the gate dielectrics and silicon fin. APT additionally provided 3D information and allowed analysis of the distribution of low atomic number dopant elements (e.g., boron), which are elusive when using STEM-EDS.

Molding of Three-Dimensional Microcomponents

2006 ◽  
Author(s):  
W. N. P. Hung ◽  
M. M. Agnihotri ◽  
M. Y. Ali ◽  
S. Yuan
Keyword(s):  
Focused Ion Beam ◽  
New Technologies ◽  
Electrical Discharge Machining ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Three Dimensional ◽  
Cost Effective ◽  
Molecular Structures ◽  
Minimum Size ◽  
Ion Beam Sputtering

Traditional micromanufacturing has been developed for semiconductor industry. Selected micro electrical mechanical systems (MEMS) have been successfully developed and implemented in industry. Since current MEMS are designed for manufacture using microelectronics processes, they are limited to two-dimensional profiles and semiconductor based materials. Such shape and material constraints would exclude many applications that require biocompatibility, dynamic stress, and high ductility. New technologies are sought to fabricate three dimensional microcomponents using robust materials for demanding applications. To be cost effective, such microdevices must be economically mass producible. Molding is one of the promising replication techniques to mass produce components from polymers and polymer-based composites. This paper presents the development of a micromolding process to produce thermoplastic microcomponents. Mold design required precision fitting and was integrated with a vacuum pump to minimize air trap in mold cavities. Nickel and aluminum mold inserts were used for the study; their cavities were fabricated by combinations of available micromachining processes like laser micromachining, micromilling, micro electrical discharge machining, and focused ion beam sputtering. High and low density polyethylene, polystyrene polymers were used for this study. The effects of polymer molecular structures, molding temperature, time, and pressure on molding results were studied. Simulation of stress in the microcomponents, plastic flow in microchannels, and mold defects was performed and compare with experimental data. The research results showed that a microcomponent can be fabricated to the minimum size of 10 ± 1μm (0.0004 inch) with surface roughness <10 nm Rt. Molding of micro-size geartrains and orthopedic meso-size fasteners was completed to illustrate the capability of this process.

scholarly journals Growth of high-quality semiconducting tellurium films for high-performance p-channel field-effect transistors with wafer-scale uniformity

2022 ◽  
Vol 6 (1) ◽  
Author(s):  
Taikyu Kim ◽  
Cheol Hee Choi ◽  
Pilgyu Byeon ◽  
Miso Lee ◽  
Aeran Song ◽  
...  
Keyword(s):  
Field Effect ◽  
Physical Vapor Deposition ◽  
High Performance ◽  
Supply Voltage ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Three Dimensional ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Wafer Scale

AbstractAchieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm2 V−1 s−1 and an ION/OFF ratio of 5.8 × 105 with 4-inch wafer-scale integrity on a SiO2/Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.

scholarly journals Effects of Doping Concentration on Device Performance of GaN-based Nano-regime MOSFETs

2017 ◽  
Vol 16 (1) ◽  
pp. 69-74
Author(s):  
Md Iktiham Bin Taher ◽  
Md. Tanvir Hasan
Keyword(s):  
Field Effect ◽  
Doping Concentration ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Gate Length ◽  
Drain Voltage ◽  
Switching Device ◽  
Device Applications

Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are promising for switching device applications. The doping of n- and p-layers is varied to evaluate the figure of merits of proposed devices with a gate length of 10 nm. Devices are switched from OFF-state (gate voltage, VGS = 0 V) to ON-state (VGS = 1 V) for a fixed drain voltage, VDS = 0.75 V. The device with channel doping of 1×1016 cm-3 and source/drain (S/D) of 1×1020 cm-3 shows good device performance due to better control of gate over channel. The ON-current (ION), OFF-current (IOFF), subthreshold swing (SS), drain induce barrier lowering (DIBL), and delay time are found to be 6.85 mA/μm, 5.15×10-7 A/μm, 87.8 mV/decade, and 100.5 mV/V, 0.035 ps, respectively. These results indicate that GaN-based MOSFETs are very suitable for the logic switching application in nanoscale regime.

Low-power tunnel field effect transistors using mixed As and Sb based heterostructures

2013 ◽  
Vol 2 (6) ◽  
pp. 637-678 ◽  
Author(s):  
Yan Zhu ◽  
Mantu K. Hudait
Keyword(s):  
Low Power ◽  
Band Gap ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Band Alignment ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Material System ◽  
Wide Range ◽  
Band Alignments

AbstractReducing supply voltage is a promising way to address the power dissipation in nano-electronic circuits. However, the fundamental lower limit of subthreshold slope (SS) within metal oxide semiconductor field effect transistors (MOSFETs) is a major obstacle to further scaling the operation voltage without degrading ON/OFF ratio in current integrated circuits. Tunnel field-effect transistors (TFETs) benefit from steep switching characteristics due to the quantum-mechanical tunneling injection of carriers from source to channel, rather than by conventional thermionic emission in MOSFETs. TFETs based on group III-V compound semiconductor materials further improve the ON-state current and reduce SS due to the low band gap energies and smaller carrier tunneling mass. The mixed arsenide/antimonide (As/Sb) InxGa1-xAs/GaAsySb1-y heterostructures allow a wide range of band gap energies and various staggered band alignments depending on the alloy compositions in the source and channel materials. Band alignments at source/channel heterointerface can be well modulated by carefully controlling the compositions of the mixed As/Sb material system. In particular, this review introduces and summarizes the progress in the development and optimization of low-power TFETs using mixed As/Sb based heterostructures including basic working principles, design considerations, material growth, interface engineering, material characterization, device fabrication, device performance investigation, band alignment determination, and high temperature reliability. A review of TFETs using mixed As/Sb based heterostructures shows superior structural properties and distinguished device performance, both of which indicate the mixed As/Sb staggered gap TFET as a promising option for high-performance, low-standby power, and energy-efficient logic circuit application.

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