Development of gallium-arsenide-based GCPW calibration kits for on-wafer measurements in the W-band

2019 ◽  
Vol 12 (5) ◽  
pp. 367-371
Author(s):  
Yibang Wang ◽  
Xingchang Fu ◽  
Aihua Wu ◽  
Chen Liu ◽  
Peng Luan ◽  
...  

AbstractWe present details of on-wafer-level 16-term error model calibration kits used for the characterization of W-band circuits based on a grounded coplanar waveguide (GCPW). These circuits were fabricated on a thin gallium arsenide (GaAs) substrate, and via holes, were utilized to ensure single mode propagation (i.e., eliminating the parallel-plate mode or surface mode). To ensure the accuracy of the definition for the calibration kits, multi-line thru-reflect-line (MTRL) assistant standards were also fabricated on the same wafer and measured. The same wafer also contained passive and active devices, which were measured subject to both 16-term and conventional line-reflect-reflect-match calibrations. Measurement results show that 16-term calibration kits are capable of determining the cross-talk more accurately. Other typical calibration techniques were also implemented using the standards on the GCPW calibration kits, and were compared with the MTRL calibration using a passive device under test. This revealed that the proposed GCPW GaAs calibration substrate could be a feasible alternative to conventional CPW impedance standard substrates, for on-wafer measurements at W-band and above.

Author(s):  
J. Wei ◽  
G. J. Qi ◽  
Z. F. Wang ◽  
Y. F. Jin ◽  
P. C. Lim ◽  
...  

In this paper, a wafer-level packaging solution for pressure sensor microelectromechanical system (MEMS) is reported. Sensor and glass cap wafers are anodically bonded at a bonding temperature less than 400°C. Bubble free interfaces are obtained and the bond strength is higher than 20 MPa. Sensor and bottom silicon cap wafers are bonded at a temperature of 400–450°C with the assistance of a gold intermediate layer. The bond strenght is higher than 5 MPa. The via holes, used for feedthroughs leading out the circuit, on bottom silicon cap wafer are anisotropically formed in KOH etching solution. Aluminum layer is sputtered on the bottom silicon wafer for electrical connection, re-routing circuit and the seed layer of under bump metallization (UBM). During sputtering process, the sidewalls of via holes are also sputtered with aluminum film. At the same time, the metal pads on sensor wafer are also built up to connect with metallized via holes. It is found that the cavities are vacuum sealed. Sputtered Cr/Ni/Au layers are used for UBM layers. Finally, solder bumps can printed or plated on the UBM. The whole process leads to promising performance of the devices.


2007 ◽  
Author(s):  
Stefano Selleri ◽  
Federica Poli ◽  
Matteo Foroni ◽  
Annamaria Cucinotta

2007 ◽  
Vol 990 ◽  
Author(s):  
Hajime Yamada ◽  
Naoko Aizawa ◽  
Hiroyuki Fujino ◽  
Yoshihiro Koshido ◽  
Yukio Yoshino

ABSTRACTWafer level chip size packages (WL-CSP) have been successfully fabricated for bulk acoustic wave (BAW) filters. WL-CSP has been completed at the wafer level prior to dicing. Two silicon wafers are used as a die and a lid for chip size packaging. Both device and lid wafers have the same expansion coefficient and the package is strong enough to withstand the thermal stress. The package has a hermetic seal with copper-tin intermetallic bonding. The bonded wafers are then thinned by grinding. Via holes are formed by reactive ion etching (RIE) and filled by copper electroplating. The package has solder bumps on each terminal, ready for flip-chip assembly. We have succeeded to produce CSP-BAW filters with a hermetically sealed cavity, which is 840 micrometers squared and 280 micrometers in height including solder bumps.


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