scholarly journals Enhancement of electrical characteristics and stability of self-patterned In–Zn–O thin-film transistors based on photosensitive precursors

2020 ◽  
Vol 10 (1) ◽  
Author(s):  
Hee Jun Kim ◽  
Joohye Jung ◽  
Hyun Jae Kim

Abstract We report a novel self-patterning method for solution-processed indium zinc oxide (IZO) thin films based on photosensitive precursors. This approach is an alternative and evolutionary approach to the traditional photoresist patterning techniques. Chelate bonds between metal ions and β-diketone compounds in ultraviolet light-exposed IZO solutions provided intrinsic photosensitivity, which resulted in a solubility difference between exposed and non-exposed regions. This difference enabled self-patterning of the IZO for thin-film transistor (TFT) fabrication. Compared with previously reported self-patterning methods based on photosensitive activators, our self-patterned IZO TFTs based on photosensitive precursors displayed excellent electrical characteristics and stability. The field-effect mobility increased from 0.27 to 0.99 cm2/Vs, the subthreshold swing decreased from 0.54 to 0.46 V/dec, and the threshold voltage shift under a positive bias stress test (1,000 s) improved from 9.32 to 1.68 V. The photosensitive precursor played a key role in these improvements permitting fewer organic species which act as defect sites after metal oxide formation. Consequently, our approach compares favorably with that of conventional fabrication process using photoresist in terms of its simplicity, cost efficiency, and electrical performance.

Author(s):  
Kyungsoo Jang ◽  
Pham Duy Phong ◽  
Yoonjung Lee ◽  
Joonghyun Park ◽  
Junsin Yi

We report the effects of surface passivation by depositing a hydrogenated amorphous silicon (a-Si:H) layer on the electrical characteristics of low temperature polycrystalline silicon thin film transistors (LTPS TFTs). The a-Si:H layer was optimized by hydrogen dilution and its structural and electrical characteristics were investigated. The a-Si:H layer in the transition region between a-Si:H and µc-Si:H resulted in superior device characteristics. Using an a-Si:H passivation layer, the field-effect mobility of the LTPS TFT was increased by 78.4% compared with a conventional LTPS TFT. Moreover, the leakage current measured at a VGS of 5 V was suppressed because the defect sites at the poly-Si grain boundaries were well passivated. Our passivation layer, which allows thorough control of the crystallinity and passivation-quality, should be considered a candidate for high performance LTPS TFTs.


Materials ◽  
2019 ◽  
Vol 12 (1) ◽  
pp. 161 ◽  
Author(s):  
Kyungsoo Jang ◽  
Youngkuk Kim ◽  
Pham Duy Phong ◽  
Younjung Lee ◽  
Joonghyun Park ◽  
...  

We report the effects of surface passivation by depositing a hydrogenated amorphous silicon (a-Si:H) layer on the electrical characteristics of low temperature polycrystalline silicon thin film transistors (LTPS TFTs). The intrinsic a-Si:H layer was optimized by hydrogen dilution and its structural and electrical characteristics were investigated. The a-Si:H layer in the transition region between a-Si:H and µc-Si:H resulted in superior device characteristics. Using a-Si:H passivation layer, the field-effect mobility of the LTPS TFT was increased by 78.4% compared with conventional LTPS TFT. Moreover, the leakage current measured at VGS of 5 V was suppressed because the defect sites at the poly-Si grain boundaries were well passivated. Our passivation layer, which allows thorough control of the crystallinity and passivation-quality, should be considered as a candidate for high performance LTPS TFTs.


2011 ◽  
Vol 26 (12) ◽  
pp. 125007 ◽  
Author(s):  
Ching-Lin Fan ◽  
Ping-Cheng Chiu ◽  
Yu-Zuo Lin ◽  
Tsung-Hsien Yang ◽  
Chin-Yuan Chiang

Coatings ◽  
2021 ◽  
Vol 11 (8) ◽  
pp. 969
Author(s):  
Haiyang Xu ◽  
Xingwei Ding ◽  
Jie Qi ◽  
Xuyong Yang ◽  
Jianhua Zhang

In this work, Y2O3–Al2O3 dielectrics were prepared and used in ZnO thin film transistor as gate insulators. The Y2O3 film prepared by the sol–gel method has many surface defects, resulting in a high density of interface states with the active layer in TFT, which then leads to poor stability of the devices. We modified it by atomic layer deposition (ALD) technology that deposited a thin Al2O3 film on the surface of a Y2O3 dielectric layer, and finally fabricated a TFT device with ZnO as the active layer by ALD. The electrical performance and bias stability of the ZnO TFT with a Y2O3–Al2O3 laminated dielectric layer were greatly improved, the subthreshold swing was reduced from 147 to 88 mV/decade, the on/off-state current ratio was increased from 4.24 × 106 to 4.16 × 108, and the threshold voltage shift was reduced from 1.4 to 0.7 V after a 5-V gate was is applied for 800 s.


2019 ◽  
Vol 19 (3) ◽  
pp. 1470-1473 ◽  
Author(s):  
Yooseong Lim ◽  
Namgyung Hwang ◽  
Jeongsuk Lee ◽  
Sehyeong Lee ◽  
Moonsuk Yi

RSC Advances ◽  
2018 ◽  
Vol 8 (13) ◽  
pp. 6925-6930 ◽  
Author(s):  
Dun-Bao Ruan ◽  
Po-Tsun Liu ◽  
Yu-Chuan Chiu ◽  
Po-Yi Kuo ◽  
Min-Chin Yu ◽  
...  

This study investigates the electrical characteristics and physical analysis for an amorphous tungsten-doped indium-zinc oxide thin film transistor with different backchannel passivation layers, which were deposited by an ion bombardment-free process.


2019 ◽  
Vol 7 (34) ◽  
pp. 10635-10641 ◽  
Author(s):  
Minh Nhut Le ◽  
Hyeongyeon Kim ◽  
Yeo Kyung Kang ◽  
Youngmin Song ◽  
Xugang Guo ◽  
...  

A facile bulk charge transfer doping method enabled electrical performance improvement of a low temperature solution processed thin film transistor.


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