scholarly journals Large-signal model of 2DFETs: compact modeling of terminal charges and intrinsic capacitances

2019 ◽  
Vol 3 (1) ◽  
Author(s):  
Francisco Pasadas ◽  
Enrique G. Marin ◽  
Alejandro Toral-Lopez ◽  
Francisco G. Ruiz ◽  
Andrés Godoy ◽  
...  

AbstractWe present a physics-based circuit-compatible model for double-gated two-dimensional semiconductor-based field-effect transistors, which provides explicit expressions for the drain current, terminal charges, and intrinsic capacitances. The drain current model is based on the drift-diffusion mechanism for the carrier transport and considers Fermi–Dirac statistics coupled with an appropriate field-effect approach. The terminal charge and intrinsic capacitance models are calculated adopting a Ward–Dutton linear charge partition scheme that guarantees charge conservation. It has been implemented in Verilog-A to make it compatible with standard circuit simulators. In order to benchmark the proposed modeling framework we also present experimental DC and high-frequency measurements of a purposely fabricated monolayer MoS2-FET showing excellent agreement between the model and the experiment and thus demonstrating the capabilities of the combined approach to predict the performance of 2DFETs.

2019 ◽  
Vol 58 (9) ◽  
pp. 095001
Author(s):  
Jiarui Bao ◽  
Shuyan Hu ◽  
Guangxi Hu ◽  
Laigui Hu ◽  
Ran Liu ◽  
...  

2013 ◽  
Vol 89 ◽  
pp. 134-138 ◽  
Author(s):  
Ashkhen Yesayan ◽  
Fabien Prégaldiny ◽  
Jean-Michel Sallese

2013 ◽  
Vol 60 (2) ◽  
pp. 848-855 ◽  
Author(s):  
Juan Pablo Duarte ◽  
Sung-Jin Choi ◽  
Dong-Il Moon ◽  
Jae-Hyuk Ahn ◽  
Jee-Yeon Kim ◽  
...  

Nanomaterials ◽  
2019 ◽  
Vol 9 (2) ◽  
pp. 181 ◽  
Author(s):  
Hongliang Lu ◽  
Bin Lu ◽  
Yuming Zhang ◽  
Yimen Zhang ◽  
Zhijun Lv

The practical use of tunnel field-effect transistors is retarded by the low on-state current. In this paper, the energy-band engineering of InAs/Si heterojunction and novel device structure of source-pocket concept are combined in a single tunnel field-effect transistor to extensively boost the device performance. The proposed device shows improved tunnel on-state current and subthreshold swing. In addition, analytical potential model for the proposed device is developed and tunneling current is also calculated. Good agreement of the modeled results with numerical simulations verifies the validation of our model. With significantly reduced simulation time while acceptable accuracy, the model would be helpful for the further investigation of TFET-based circuit simulations.


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