Low-voltage and high-performance field-effect transistors based on ZnxSn1−xO nanofibers with a ZrOx dielectric

Nanoscale ◽  
2018 ◽  
Vol 10 (30) ◽  
pp. 14712-14718 ◽  
Author(s):  
Zhen Wang ◽  
You Meng ◽  
Youchao Cui ◽  
Caixuan Fan ◽  
Guoxia Liu ◽  
...  

The electrical performance of FETs based on ZnxSn1−xO nanofibers can be precisely regulated by manipulating their composition ratios.

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Muhammad Naqi ◽  
Kyung Hwan Choi ◽  
Hocheon Yoo ◽  
Sudong Chae ◽  
Bum Jun Kim ◽  
...  

AbstractLow-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.


2019 ◽  
Vol 11 (37) ◽  
pp. 34188-34195 ◽  
Author(s):  
Hongming Chen ◽  
Xing Xing ◽  
Miao Zhu ◽  
Jupeng Cao ◽  
Muhammad Umair Ali ◽  
...  

2011 ◽  
Vol 4 (1) ◽  
pp. 6-10 ◽  
Author(s):  
Sooji Nam ◽  
Jaeyoung Jang ◽  
Jong-Jin Park ◽  
Sang Won Kim ◽  
Chan Eon Park ◽  
...  

2018 ◽  
Vol 9 (1) ◽  
pp. 2 ◽  
Author(s):  
Sooji Nam ◽  
Yong Jeong ◽  
Joo Kim ◽  
Hansol Yang ◽  
Jaeyoung Jang

Here, we report on the use of a graphene oxide (GO)/polystyrene (PS) bilayer as a gate dielectric for low-voltage organic field-effect transistors (OFETs). The hydrophilic functional groups of GO cause surface trapping and high gate leakage, which can be overcome by introducing a layer of PS—a hydrophobic polymer—onto the top surface of GO. The GO/PS gate dielectric shows reduced surface roughness and gate leakage while maintaining a high capacitance of 37.8 nF cm−2. The resulting OFETs show high-performance operation with a high mobility of 1.05 cm2 V−1 s−1 within a low operating voltage of −5 V.


Sign in / Sign up

Export Citation Format

Share Document