Gridistor: field-effect transistor for an ultra-high-frequency power amplifier

1972 ◽  
Vol 8 (12) ◽  
pp. 306 ◽  
Author(s):  
P. Durand ◽  
J. Laplanche
Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 3121
Author(s):  
Monica La Mura ◽  
Patrizia Lamberti ◽  
Vincenzo Tucci

The interest in graphene-based electronics is due to graphene’s great carrier mobility, atomic thickness, resistance to radiation, and tolerance to extreme temperatures. These characteristics enable the development of extremely miniaturized high-performing electronic devices for next-generation radiofrequency (RF) communication systems. The main building block of graphene-based electronics is the graphene-field effect transistor (GFET). An important issue hindering the diffusion of GFET-based circuits on a commercial level is the repeatability of the fabrication process, which affects the uncertainty of both the device geometry and the graphene quality. Concerning the GFET geometrical parameters, it is well known that the channel length is the main factor that determines the high-frequency limitations of a field-effect transistor, and is therefore the parameter that should be better controlled during the fabrication. Nevertheless, other parameters are affected by a fabrication-related tolerance; to understand to which extent an increase of the accuracy of the GFET layout patterning process steps can improve the performance uniformity, their impact on the GFET performance variability should be considered and compared to that of the channel length. In this work, we assess the impact of the fabrication-related tolerances of GFET-base amplifier geometrical parameters on the RF performance, in terms of the amplifier transit frequency and maximum oscillation frequency, by using a design-of-experiments approach.


2016 ◽  
Vol 13 (2) ◽  
pp. 39-50 ◽  
Author(s):  
Zheng Chen ◽  
Yiying Yao ◽  
Wenli Zhang ◽  
Dushan Boroyevich ◽  
Khai Ngo ◽  
...  

This article presents a 1,200-V, 120-A silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET) phase-leg module capable of operating at 200°C ambient temperature. Paralleling six 20-A MOSFET bare dice for each switch, this module outperforms the commercial SiC modules in higher operating temperature and lower package parasitics at a comparable power rating. The module's high-temperature capability is validated through the extensive characterizations of the SiC MOSFET, as well as the careful selections of suitable packaging materials. Particularly, the sealed-step-edge technology is implemented on the direct-bonded-copper substrates to improve the module's thermal cycling lifetime. Though still based on the regular wire-bond structure, the module is able to achieve over 40% reduction in the switching loop inductance compared with a commercial SiC module by optimizing its internal layout. By further embedding decoupling capacitors directly on the substrates, the module also allows SiC MOSFETs to be switched twice faster with only one-third turn-off overvoltages compared with the commercial module.


2020 ◽  
Vol 67 (7) ◽  
pp. 5708-5716
Author(s):  
Vivek Sangwan ◽  
Cher Ming Tan ◽  
Dipesh Kapoor ◽  
Hsien-Chin Chiu

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