scholarly journals Numerical Evaluation of the Effect of Geometric Tolerances on the High-Frequency Performance of Graphene Field-Effect Transistors

Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 3121
Author(s):  
Monica La Mura ◽  
Patrizia Lamberti ◽  
Vincenzo Tucci
Keyword(s):  
High Frequency ◽  
Communication Systems ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Channel Length ◽  
Geometrical Parameters ◽  
Effect Transistor ◽  
Rf Performance ◽  
The Impact

The interest in graphene-based electronics is due to graphene’s great carrier mobility, atomic thickness, resistance to radiation, and tolerance to extreme temperatures. These characteristics enable the development of extremely miniaturized high-performing electronic devices for next-generation radiofrequency (RF) communication systems. The main building block of graphene-based electronics is the graphene-field effect transistor (GFET). An important issue hindering the diffusion of GFET-based circuits on a commercial level is the repeatability of the fabrication process, which affects the uncertainty of both the device geometry and the graphene quality. Concerning the GFET geometrical parameters, it is well known that the channel length is the main factor that determines the high-frequency limitations of a field-effect transistor, and is therefore the parameter that should be better controlled during the fabrication. Nevertheless, other parameters are affected by a fabrication-related tolerance; to understand to which extent an increase of the accuracy of the GFET layout patterning process steps can improve the performance uniformity, their impact on the GFET performance variability should be considered and compared to that of the channel length. In this work, we assess the impact of the fabrication-related tolerances of GFET-base amplifier geometrical parameters on the RF performance, in terms of the amplifier transit frequency and maximum oscillation frequency, by using a design-of-experiments approach.

scholarly journals Investigation of the impact of mole-fraction on the digital benchmarking parameters as well as sensitivity in GaXIn1-XAs/GaYIn1-YSb vertical heterojunctionless tunneling field effect transistor

2021 ◽  
Author(s):  
Behzad Rajabi ◽  
Mahdi Vadizadeh
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Channel Length ◽  
The Body ◽  
Threshold Region ◽  
Type I ◽  
Type Ii ◽  
Effect Transistor ◽  
Reasonable Choice ◽  
The Impact

Abstract GaXIn1-XAs/GaYIn1-YSb vertical heterojunctionless tunneling field effect transistor (VHJL-TFET) has been suggested to optimize the digital benchmarking parameters. In the proposed VHJL-TFET with type II heterostructure (i.e. X=0.8, Y=0.85), slight changes in gate voltage cause switching from OFF-state to ON-state. As a result, the electrical properties of Ga0.8In0.2As/Ga0.85In0.15Sb VHJL-TFET are excellent in the sub-threshold region. The heterostructure with III-V semiconductors in the source-channel region increases the ON-state current (ION (of the VHJL-TFET. Comparing the results of Ga0.8In0.2As/Ga0.85In0.15Sb VHJL-TFET with the simulated devices with type I heterostructure (i.e. X=0.9, Y=0.1) and type III heterostructure (i.e. X=0.1, Y=0.4) shows the improvement by 26% and 15% in the average subthreshold slope (SS). Sensitivity analysis for VHJL-TFET with the type II heterostructure shows that the sensitivity of OFF-state current (IOFF) to the body thickness (Tb) and doping concentration (ND) is more than the sensitivity of the other main electrical parameters. The Ga0.8In0.2As/Ga0.85In0.15Sb VHJL-TFET with a channel length of 20 nm, Tb=5 nm, and ND=1×1018cm-3 showed the SS=4.4mV/dec, ION/IOFF=4E14, and ION=8mA/um. As a result, Ga0.8In0.2As/Ga0.85In0.15Sb VHJL-TFET can be a reasonable choice for digital applications.

scholarly journals Investigation of the impact of mole-fraction on the digital benchmarking parameters as well as sensitivity in GaXIn1−XAs/GaYIn1−YSb vertical heterojunctionless tunneling field effect transistor

2021 ◽  
pp. 2150161
Author(s):  
Behzad Rajabi ◽  
Mahdi Vadizadeh
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Channel Length ◽  
The Body ◽  
Threshold Region ◽  
Type I ◽  
Type Ii ◽  
Effect Transistor ◽  
Reasonable Choice ◽  
The Impact

Ga[Formula: see text]In[Formula: see text]As/Ga[Formula: see text]In[Formula: see text]Sb vertical heterojunctionless tunneling field effect transistor (VHJL-TFET) has been suggested to optimize the digital benchmarking parameters. In the proposed VHJL-TFET with type II heterostructure (i.e., [Formula: see text] and [Formula: see text]), slight changes in gate voltage cause switching from OFF-state to ON-state. As a result, the electrical properties of Ga[Formula: see text]In[Formula: see text]As/Ga[Formula: see text]In[Formula: see text]Sb VHJL-TFET are excellent in the sub-threshold region. The heterostructure with III–V semiconductors in the source-channel region increases the ON-state current ([Formula: see text]) of the VHJL-TFET. Comparing the results of Ga[Formula: see text]In[Formula: see text]As/Ga[Formula: see text]In[Formula: see text]Sb VHJL-TFET with the simulated devices with type I heterostructure (i.e., [Formula: see text] and [Formula: see text]) and type III heterostructure (i.e., [Formula: see text] and [Formula: see text]) shows the improvement by 26% and 15% in the average subthreshold slope (SS). Sensitivity analysis for VHJL-TFET with the type II heterostructure shows that the sensitivity of OFF-state current ([Formula: see text] to the body thickness ([Formula: see text] and doping concentration ([Formula: see text] is more than the sensitivity of the other main electrical parameters. The Ga[Formula: see text]In[Formula: see text]As/Ga[Formula: see text]In[Formula: see text]Sb VHJL-TFET with a channel length of 20 nm, [Formula: see text] nm, and [Formula: see text] cm[Formula: see text] showed the [Formula: see text] mV/dec, [Formula: see text]/[Formula: see text], and [Formula: see text] mA/um. As a result, Ga[Formula: see text]In[Formula: see text]As/Ga[Formula: see text]In[Formula: see text]Sb VHJL-TFET can be a reasonable choice for digital applications.

Junctionless Accumulation Mode Ferroelectric FET (JAM-FE-FET) for High Frequency Digital and Analog applications

2021 ◽  
Author(s):  
Snehlata Yadav ◽  
Sonam Rewari ◽  
Rajeshwari Pandey
Keyword(s):  
High Frequency ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Accumulation Mode ◽  
Effect Transistor ◽  
Rf Performance ◽  
Silvaco Atlas ◽  
Channel Lengths ◽  
Output Conductance ◽  
Intrinsic Gain

Abstract In this paper, a Junctionless Accumulation Mode Ferroelectric Field Effect Transistor (JAM-FE-FET) has been proposed and assessed in terms of RF/analog specifications for varied channel lengths through simulations using TCAD Silvaco ATLAS simulator, using the Shockley-Read-Hall (SRH) recombination, ferro, Lombardi CVT, fermi and LK models. Major analog metrics like transconductance (gm), intrinsic gain (AV), output conductance (gd), and early voltage (VEA) are obtained for the JAM-FE-FET arrangement. The proposed structure shows an improvement in parameters like gm, Ion/Ioff, Av, TGF by 6.82%, 27.95%, 5.2%, 38.83% respectively. Further, frequency analysis of the proposed device is performed and several critical RF parameters like fT, TFP, GFP, and GTFP have been observed to be enhanced by 6.89%, 11.38%, 13.65%, 12.01% respectively. Thus, the Junctionless accumulation mode ferroelectric FET (JAM-FE-FET) arrangement has been found to have superior analog and RF performance when compared to Junctionless ferroelectric FET(JL-FE-FET). As a result, the JAM-FE-FET device presented here can be contemplated a good contender for applications in high-frequency systems.

scholarly journals A Doping-Less Tunnel Field-Effect Transistor with Si0.6Ge0.4 Heterojunction for the Improvement of the On–Off Current Ratio and Analog/RF Performance

Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 574 ◽  
Author(s):  
Tao Han ◽  
Hongxia Liu ◽  
Shupeng Chen ◽  
Shulong Wang ◽  
Wei Li
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Cutoff Frequency ◽  
Current Ratio ◽  
Germanium Content ◽  
Dielectric Thickness ◽  
Ultra Low Power ◽  
Effect Transistor ◽  
Rf Performance

In this paper, a novel doping-less tunneling field-effect transistor with Si0.6Ge0.4 heterojunction (H-DLTFET) is proposed using TCAD simulation. Unlike conventional doping-less tunneling field-effect transistors (DLTFETs), in H-DLTFETs, germanium and Si0.6Ge0.4 are used as source and channel materials, respectively, to provide higher carrier mobility and smaller tunneling barrier width. The energy band and charge carrier tunneling efficiency of the tunneling junction become steeper and higher as a result of the Si0.6Ge0.4 heterojunction. In addition, the effects of the source work function, gate oxide dielectric thickness, and germanium content on the performance of the H-DLTFET are analyzed systematically, and the below optimal device parameters are obtained. The simulation results show that the performance parameters of the H-DLTFET, such as the on-state current, on/off current ratio, output current, subthreshold swing, total gate capacitance, cutoff frequency, and gain bandwidth (GBW) product when Vd = 1 V and Vg = 2 V, are better than those of conventional silicon-based DLTFETs. Therefore, the H-DLTFET has better potential for use in ultra-low power devices.

Instability and gate voltage noise in GaAs metal-semiconductor field-effect transistors

1989 ◽  
Vol 67 (4) ◽  
pp. 238-241 ◽  
Author(s):  
D. J. Day ◽  
M. Trudeau ◽  
S. P. McAlister ◽  
C. M. Hurd
Keyword(s):  
Gate Voltage ◽  
High Frequency ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Voltage Noise ◽  
Drain Bias ◽  
Effect Transistor ◽  
Noise Spectra ◽  
Insulating Substrates

GaAs metal-semiconductor field-effect transistor devices grown on semi-insulating substrates are shown to display noise spectra with a f−3/2 high-frequency roll-off. This is interpreted as diffusion noise from generation-recombination events at traps in the semi-insulating substrate. This interpretation is confirmed by the instabilities and oscillations that occur when the devices are operated under a large drain bias.

Effect of Metal - Silicon Nanowire Contacts on the Performance of Accumulation Metal Oxide Semiconductor Field Effect Transistor

2008 ◽  
Vol 1144 ◽  
Author(s):  
Pranav Garg ◽  
Yi Hong ◽  
Md. Mash-Hud Iqbal ◽  
Stephen J. Fonash
Keyword(s):  
Metal Oxide ◽  
Silicon Nanowires ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Silicon Nanowire ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Manufacturing Cost ◽  
Effect Transistor ◽  
The Impact

ABSTRACTRecently, we have experimentally demonstrated a very simply structured unipolar accumulation-type metal oxide semiconductor field effect transistor (AMOSFET) using grow-in-place silicon nanowires. The AMOSFET consists of a single doping type nanowire, metal source and drain contacts which are separated by a partially gated region. Despite its simple configuration, it is capable of high performance thereby offering the potential of a low manufacturing-cost transistor. Since the quality of the metal/semiconductor ohmic source and drain contacts impacts AMOSFET performance, we repot here on initial exploration of contact variations and of the impact of thermal process history. With process optimization, current on/off ratios of 106 and subthreshold swings of 70 mV/dec have been achieved with these simple devices

On Razors Edge: Influence of the Source Insulator Edge on the Charge Transport of Vertical Organic Field Effect Transistors

MRS Advances ◽  
2017 ◽  
Vol 2 (23) ◽  
pp. 1249-1257 ◽  
Author(s):  
F. Michael Sawatzki ◽  
Alrun A. Hauke ◽  
Duy Hai Doan ◽  
Peter Formanek ◽  
Daniel Kasemann ◽  
...  
Keyword(s):  
Charge Transport ◽  
Organic Semiconductors ◽  
Organic Solar Cells ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Electrical Power ◽  
Strong Impact ◽  
Organic Field Effect Transistor ◽  
Effect Transistor

ABSTRACTTo benefit from the many advantages of organic semiconductors like flexibility, transparency, and small thickness, electronic devices should be entirely made from organic materials. This means, additionally to organic LEDs, organic solar cells, and organic sensors, we need organic transistors to amplify, process, and control signals and electrical power. The standard lateral organic field effect transistor (OFET) does not offer the necessary performance for many of these applications. One promising candidate for solving this problem is the vertical organic field effect transistor (VOFET). In addition to the altered structure of the electrodes, the VOFET has one additional part compared to the OFET – the source-insulator. However, the influence of the used material, the size, and geometry of this insulator on the behavior of the transistor has not yet been examined. We investigate key-parameters of the VOFET with different source insulator materials and geometries. We also present transmission electron microscopy (TEM) images of the edge area. Additionally, we investigate the charge transport in such devices using drift-diffusion simulations and the concept of a vertical organic light emitting transistor (VOLET). The VOLET is a VOFET with an embedded OLED. It allows the tracking of the local current density by measuring the light intensity distribution.We show that the insulator material and thickness only have a small influence on the performance, while there is a strong impact by the insulator geometry – mainly the overlap of the insulator into the channel. By tuning this overlap, on/off-ratios of 9x105 without contact doping are possible.

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