Low-voltage BIMOS AM front-end amplifier

In this paper, we present a new digital baseband processor for UHF tags. It is a low-power and low-voltage digital circuit and adopts the Chinese military standard protocol GJB7377.1. The processor receives data or commands from the RF front-end and carries out various functions, such as receiving and writing data to memory, reading and sending memory data to the RF front-end and killing tags. The processor consists of thirteen main sub-modules: TPP decoding, clock management, random number generator, power management, memory controller, cyclic redundancy check, FM0 encoding, input data processing, output data processing, command detection module, initialization module, state machine module and controller. We use ModelSim for the TPP decoding simulation and communication simulation between tag and reader, and the simulation results meet the design requirements. The processor can be applied to UHF tags and has been taped out using a TSMC 0.18 um CMOS process.

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A Low-Voltage 5.8-GHz Complementary Metal Oxide Semiconductor Transceiver Front-End Chip Design for Dedicated Short-Range Communication Application

Lecture Notes in Electrical Engineering - Computer Engineering and Networking ◽

10.1007/978-3-319-01766-2_118 ◽

2013 ◽

pp. 1035-1043

Author(s):

Jhin-Fang Huang ◽

Jiun-Yu Wen ◽

Yong-Jhen Jiangn

Keyword(s):

Metal Oxide ◽

Short Range ◽

Low Voltage ◽

Complementary Metal Oxide Semiconductor ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Chip Design ◽

Dedicated Short Range Communication ◽

Front End

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A low-voltage silicon bipolar RF front-end for PCN receiver applications

Proceedings ISSCC '95 - International Solid-State Circuits Conference ◽

10.1109/isscc.1995.535465 ◽

2002 ◽

Cited By ~ 18

Author(s):

J.R. Long ◽

M.A. Copeland ◽

P. Schvan ◽

R.A. Hadaway

Keyword(s):

Low Voltage ◽

Front End ◽

Rf Front End

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Study on Performance Analysis of CMOS RF front-end circuits for 2.4GHz Wireless Applications

International Journal of Electronics and Electical Engineering ◽

10.47893/ijeee.2012.1014 ◽

2012 ◽

pp. 68-73

Author(s):

M. Sumathi ◽

S. Malarvizhi

Keyword(s):

Performance Analysis ◽

Low Voltage ◽

Noise Figure ◽

Supply Voltage ◽

Low Noise ◽

Design System ◽

Wireless Applications ◽

Front End ◽

Trade Offs ◽

Front End Circuits

In this paper, low voltage design concepts and new CMOS front-end circuits for 2.4GHz wireless applications are presented. The performances of these circuits are analysed and compared with other existing structures using TSMC 0.18-μm CMOS technology scale. The design trade-offs between impedance matching, power gain and noise figure of low-noise amplifiers are highlighted. The advantage of the introduced mixer topology is expressed in terms of conversion gain, noise figure and linearity. At a supply voltage of 1.8V, the design and performance analysis have been performed using Agilent’s Advanced Design System (ADS2009) software.

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Low voltage log domain front end for the extraction of 2-D sound localization cues

ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483) ◽

10.1109/icecs.2001.957493 ◽

2002 ◽

Author(s):

I. Grech ◽

J. Micallef ◽

T. Vladimirova

Keyword(s):

Sound Localization ◽

Low Voltage ◽

Front End ◽

Log Domain

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Low Voltage Stochastic Flash ADC with Front-end of Inverter-based Comparative Unit

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060466 ◽

2017 ◽

Author(s):

Xuncheng Zou ◽

Bo Liu ◽

Shigetoshi Nakatake

Keyword(s):

Low Voltage ◽

Flash Adc ◽

Front End

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A Low-Voltage Multi-Band ZigBee Transceiver

Electronics ◽

10.3390/electronics8121474 ◽

2019 ◽

Vol 8 (12) ◽

pp. 1474

Author(s):

Zhiqun Li ◽

Yan Yao ◽

Zengqi Wang ◽

Guoxiao Cheng ◽

Lei Luo

Keyword(s):

Frequency Synthesizer ◽

Low Voltage ◽

Supply Voltage ◽

Maximum Output Power ◽

Cmos Technology ◽

Maximum Output ◽

Band Pass Filter ◽

Pass Filter ◽

Front End ◽

Band Pass

This paper presents a low-voltage ZigBee transceiver covering a unique frequency band of 780/868/915/2400 MHz in 180 nm CMOS technology. The design consists of a receiver with a wideband variable-gain front end and a complex band-pass filter (CBPF) based on poles construction, a transmitter employing the two-point direct-modulation structure, a Ʃ-Δ fractional-N frequency synthesizer with two VCOs and some auxiliary circuits. The measured results show that under 1 V supply voltage, the receiver reaches −93.8 dBm and −102 dBm sensitivity for 2.4 GHz and sub-GHz band, respectively, and dissipates only 1.42 mW power. The frequency synthesizer achieves −106.8 dBc/Hz and −116.7 dBc/Hz phase noise at 1 MHz frequency offset along with 4.2 mW and 3.5 mW power consumption for 2.4 GHz and sub-GHz band, respectively. The transmitter features 2.67 dBm and 12.65 dBm maximum output power at the expense of 21.2 mW and 69.5 mW power for 2.4 GHz and sub-GHz band, respectively.

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