Local damage simulations of printed circuit boards based on in‐plane cohesive zone parameters

Circuit World ◽  
2013 ◽  
Vol 39 (2) ◽  
pp. 60-66 ◽  
Author(s):  
Peter Filipp Fuchs ◽  
Klaus Fellner ◽  
Gerald Pinter
Keyword(s):  
Finite Element ◽  
Energy Release Rate ◽  
Energy Release ◽  
Release Rate ◽  
Cohesive Zone ◽  
Printed Circuit Boards ◽  
Circuit Board ◽  
Circuit Boards ◽  
Content Type ◽  
Printed Circuit

PurposeThe purpose of this paper is to analyse, in a finite element simulation, the failure of a multilayer printed circuit board (PCB), exposed to an impact load, to better evaluate the reliability and lifetime. Thereby the focus was set on failures in the outermost epoxy layer.Design/methodology/approachThe fracture behaviour of the affected material was characterized. The parameters of a cohesive zone law were determined by performing a double cantilever beam test and a corresponding simulation. The cohesive zone law was used in an enriched finite element local simulation model to predict the crack initiation and crack propagation. Using the determined location of the initial crack, the energy release rate at the crack tip was calculated, allowing an evaluation of the local loading situation.FindingsA good concurrence between the simulated and the experimentally observed failure pattern was observed. Calculating the energy release rate of two example PCBs, the significant influence of the chosen type on the local failure behaviour was proven.Originality/valueThe work presented in this paper allows for the simulation and evaluation of failure in the outermost epoxy layers of printed circuit boards due to impact loads.

New technologies of multi-layered printed circuit boards, intended of rapid-design electronic modules

Circuit World ◽  
2015 ◽  
Vol 41 (3) ◽  
pp. 121-124
Author(s):  
Wojciech Stęplewski ◽  
Mateusz Mroczkowski ◽  
Radoslav Darakchiev ◽  
Konrad Futera ◽  
Grażyna Kozioł
Keyword(s):  
Printed Circuit Boards ◽  
New Technologies ◽  
Circuit Board ◽  
Circuit Boards ◽  
Content Type ◽  
Signal Distribution ◽  
Printed Circuit ◽  
Rapid Design ◽  
Small Pitch ◽  
Signal Path

Purpose – The purpose of this study was the use of embedded components technology and innovative concepts of the printed circuit board (PCB) for electronic modules containing field-programmable gate array (FPGA) devices with a large number of pins (e.g. Virtex 6, FF1156/RF1156 package, 1,156 pins). Design/methodology/approach – In the multi-layered boards, embedded passive components that support FPGA device input/output (I/O), such as blocking capacitors and pull-up resistors, were used. These modules can be used in rapid design of electronic devices. In the study, the MC16T FaradFlex material was used for the inner capacitive layer. The Ohmega-Ply RCM 25 Ω/sq material was used to manufacture pull-up resistors for high-frequency pins. The embedded components have been connected to pins of the FPGA component by using plated-through holes for capacitors and blind vias for resistors. Also, a technique for a board-to-board joining, by using castellated terminations, is described. Findings – The fully functional modules for assembly of the FPGA were manufactured. Achieved resistance of embedded micro resistors, as small as the smallest currently used surface-mount device components (01005), was below required tolerance of 10 per cent. Obtained tolerance of capacitors was less than 3 per cent. Use of embedded components allowed to replace the pull-up resistors and blocking capacitors and shortens the signal path from the I/O of the FPGA. Correct connection to the castellated terminations with a very small pitch was also obtained. This allows in further planned studies to create a full signal distribution system from the FPGA without the use of unreliable plug connectors in aviation and space technology. Originality/value – This study developed and manufactured several innovative concepts of signal distribution from printed circuit boards. The signal distribution solutions were integrated with embedded components, which allowed for significant reduction in the signal path. This study allows us to build the target object that is the module for rapid design of the FPGA device. Usage of a pre-designed module would lessen the time needed to develop a FPGA-based device, as a significant part of the necessary work (mainly designing the signal and power fan-out) will already be done during the module development.

Identification of printed circuit boards mechanical properties using response surface methods

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Mohammad Gharaibeh
Keyword(s):  
Finite Element ◽  
Response Surface ◽  
Material Properties ◽  
Printed Circuit Boards ◽  
Dynamic Testing ◽  
Mode Shapes ◽  
Fe Model ◽  
Circuit Boards ◽  
Content Type ◽  
Printed Circuit

Purpose This study aims to discuss the determination of the unknown in-plane mechanical material properties of printed circuit boards (PCBs) by correlating the results from dynamic testing and finite element (FE) models using the response surface method (RSM). Design/methodology/approach The first 10 resonant frequencies and vibratory mode shapes are measured using modal analysis with hammer testing experiment, and hence, systematically compared with finite element analysis (FEA) results. The RSM is consequently used to minimize the cumulative error between dynamic testing and FEA results by continuously modifying the FE model, to acquire material properties of PCBs. Findings Great agreement is shown when comparing FEA to measurements, the optimum in-plane material properties were identified, and hence, verified. Originality/value This paper used FEA and RSMs along with modal measurements to obtain in-plane material properties of PCBs. The methodology presented here can be easily generalized and repeated for different board designs and configurations.

Influence of thermal cycling on reliability of solder joints executed on long and metal core PCBs

2015 ◽  
Vol 27 (3) ◽  
pp. 120-124 ◽  
Author(s):  
Janusz Sitek ◽  
Aneta Araźna ◽  
Kamil Janeczek ◽  
Wojciech Stęplewski ◽  
Krzysztof Lipiec ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Boards ◽  
Solder Joints ◽  
Circuit Board ◽  
Circuit Boards ◽  
Thermal Cycles ◽  
Metal Core ◽  
Content Type ◽  
Printed Circuit ◽  
Reliability Of Solder Joints

Purpose – The purpose of this paper is to evaluate the reliability of solder joints made on long FR-4 and metal core printed circuit boards using the accelerated thermal cycling. Design/methodology/approach – Solder joints of diodes and resistors samples made on long FR-4 and aluminum (Al) core printed circuit boards were examined. Two kinds of solder pastes were used for the samples preparation. All samples were subjected to temperature aging cycles (−40°C – 3 hours/+85°C – 3 hours). Solder joints resistance, X-Ray inspection and metallographic cross-sections for samples as received and after 100, 500 and 1,000 hours of thermal cycles were utilized for solder joints assessment. Findings – It was stated that 1,000 hours of thermal cycles were enough to show reliability problems in solder joints on long and/or AL core printed circuit board assembly (PCBA). The solder joints of R1206 components were the most sensitive reliability elements. The solder joints of LED diodes are more reliable than solder joints of R1206 resistors. Solder joints made on FR-4 substrate were about two times more reliable than ones on AL core substrate. Cracks in solder joints were the visible reason of solder joints failures. Originality/value – The influence of thermal cycles on the reliability of solder joints on long, FR-4 and metal core printed circuit boards were presented. Findings from this paper can be used for planning of reliability trials during validation of reflow processes of products containing long or long metal core printed circuit boards (PCBs).

Calculating Energy Release Rate as a Function of Crack Length Using a Multiple-Step Crack Closure Technique in Tire Finite Element Models

2018 ◽  
Vol 46 (3) ◽  
pp. 130-152
Author(s):  
Dennis S. Kelliher
Keyword(s):  
Finite Element ◽  
Energy Release Rate ◽  
Crack Length ◽  
Energy Release ◽  
Crack Closure ◽  
Release Rate ◽  
Fatigue Behavior ◽  
Three Dimensions ◽  
Quantitative Prediction ◽  
Closure Technique

ABSTRACT When performing predictive durability analyses on tires using finite element methods, it is generally recognized that energy release rate (ERR) is the best measure by which to characterize the fatigue behavior of rubber. By addressing actual cracks in a simulation geometry, ERR provides a more appropriate durability criterion than the strain energy density (SED) of geometries without cracks. If determined as a function of crack length and loading history, and augmented with material crack growth properties, ERR allows for a quantitative prediction of fatigue life. Complications arise, however, from extra steps required to implement the calculation of ERR within the analysis process. This article presents an overview and some details of a method to perform such analyses. The method involves a preprocessing step that automates the creation of a ribbon crack within an axisymmetric-geometry finite element model at a predetermined location. After inflating and expanding to three dimensions to fully load the tire against a surface, full ribbon sections of the crack are then incrementally closed through multiple solution steps, finally achieving complete closure. A postprocessing step is developed to determine ERR as a function of crack length from this enforced crack closure technique. This includes an innovative approach to calculating ERR as the crack length approaches zero.

Dielectric Breakdown in Printed Circuit Boards at Elevated Temperatures

1996 ◽  
Author(s):  
P. Singh ◽  
G.T. Galyon ◽  
J. Obrzut ◽  
W.A. Alpaugh
Keyword(s):  
Experimental Data ◽  
Thermal Degradation ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Elevated Temperatures ◽  
Dielectric Breakdown ◽  
Circuit Board ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Data Matching

Abstract A time delayed dielectric breakdown in printed circuit boards, operating at temperatures below the epoxy resin insulation thermo-electrical limits, is reported. The safe temperature-voltage operating regime was estimated and related to the glass-rubber transition (To) of printed circuit board dielectric. The TG was measured using DSC and compared with that determined from electrical conductivity of the laminate in the glassy and rubbery state. A failure model was developed and fitted to the experimental data matching a localized thermal degradation of the dielectric and time dependency. The model is based on localized heating of an insulation resistance defect that under certain voltage bias can exceed the TG, thus, initiating thermal degradation of the resin. The model agrees well with the experimental data and indicates that the failure rate and truncation time beyond which the probability of failure becomes insignificant, decreases with increasing glass-rubber transition temperature.

Evaluation of new technologies and materials for printed circuit boards with improved heat dissipation properties

Circuit World ◽  
2016 ◽  
Vol 42 (1) ◽  
pp. 32-36 ◽  
Author(s):  
Michal Baszynski ◽  
Edward Ramotowski ◽  
Dariusz Ostaszewski ◽  
Tomasz Klej ◽  
Mariusz Wojcik ◽  
...  
Keyword(s):  
Thermal Properties ◽  
Printed Circuit Boards ◽  
Heat Dissipation ◽  
Printed Circuit Board ◽  
New Technologies ◽  
Electronic Device ◽  
Circuit Board ◽  
New Materials ◽  
Content Type ◽  
Printed Circuit

Purpose – The purpose of this paper is to evaluate thermal properties of printed circuit board (PCB) made with use of new materials and technologies. Design/methodology/approach – Four PCBs with the same layout but made with use of different materials and technologies have been investigated using thermal camera to compare their thermal properties. Findings – The results show how important the thermal properties of PCBs are for providing effective heat dissipation, and how a simple alteration to the design can help to improve the thermal performance of electronic device. Proper layout, new materials and technologies of PCB manufacturing can significantly reduce the temperature of electronic components resulting in higher reliability of electronic and power electronic devices. Originality/value – This paper shows the advantages of new technologies and materials in PCB thermal management.

scholarly journals A model for the reflection of terahertz signals from printed circuit board surfaces

2018 ◽  
Vol 10 (2) ◽  
pp. 179-186 ◽  
Author(s):  
Alexander Fricke ◽  
Mounir Achir ◽  
Philippe Le Bars ◽  
Thomas Kürner
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Simulated Annealing Algorithm ◽  
Specular Reflection ◽  
Circuit Board ◽  
Network Analyzer ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Propagation Modeling ◽  
Annealing Algorithm

AbstractBased on vector network analyzer Measurements, a model for the specular reflection behavior of printed circuit boards in the Terahertz range has been derived. It has been calibrated to suit the behavior of the measurements using a simulated annealing algorithm. The model has been tailored for integration to ray-tracing-based propagation modeling.

scholarly journals NotchPUF: Printed Circuit Board PUF Based on Microstrip Notch Filter

Cryptography ◽  
2020 ◽  
Vol 4 (2) ◽  
pp. 11
Author(s):  
Mitchell Martin ◽  
Jim Plusquellic
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Statistical Tests ◽  
Notch Filter ◽  
Circuit Board ◽  
Circuit Boards ◽  
Printed Circuit ◽  
In Series ◽  
Commercial Off The Shelf ◽  
Using Data

Physical Unclonable Functions (PUFs) are primitives that are designed to leverage naturally occurring variations to produce a random bitstring. Current PUF designs are typically implemented in silicon or utilize variations found in commercial off-the-shelf (COTS) parts. Because of this, existing designs are insufficient for the authentication of Printed Circuit Boards (PCBs). In this paper, we propose a novel PUF design that leverages board variations in a manufactured PCB to generate unique and stable IDs for each PCB. In particular, a single copper trace is used as a source of randomness for bitstring generation. The trace connects three notch filter structures in series, each of which is designed to reject specific but separate frequencies. The bitstrings generated using data measured from a set of PCBs are analyzed using statistical tests to illustrate that high levels of uniqueness and randomness are achievable.

Fabrication and surface treatment of fine copper lines for HDI printed circuit board with modified full-additive method

Circuit World ◽  
2017 ◽  
Vol 43 (3) ◽  
pp. 131-138 ◽  
Author(s):  
Huirong He ◽  
Jida Chen ◽  
Shengtao Zhang ◽  
Minhui Liao ◽  
Lingxing Li ◽  
...  
Keyword(s):  
Printed Circuit Boards ◽  
High Efficiency ◽  
Oxidation Process ◽  
Optical Microscope ◽  
Circuit Board ◽  
Content Type ◽  
Printed Circuit ◽  
Additive Method ◽  
Fine Copper

Purpose This paper aims to propose a modified full-additive method (MFAM) to fabricate fine copper lines for high density interconnection (HDI) printed circuit boards (PCBs). In addition, the surface of the fine copper lines is treated with a brown oxidation process to obtain good adhesion between the copper and the dielectric resin. Design/methodology/approach Fine copper lines fabricated by MFAM were observed to evaluate the undercut quality, in comparison to undercut quality of copper lines fabricated by the semi-additive method and the subtractive method. The effect of the thickness of the dry film on the quality of the copper plating was investigated to obtain the regular shape of fine lines. The fine copper lines treated with the brown oxidation process were also examined to generate a coarse surface microstructure to improve the adhesion between the copper and the dielectric resin. The cross section and surface of as-fabricated fine copper lines were characterized using an optical microscope, a scanning electron microscope and an atomic force microscope. Findings MFAM has the potential to fabricate high-performance fine copper lines for HDI PCBs. Undercut of as-fabricated fine copper lines could be prevented to meet the design requirement of impedance. In addition, fine copper lines exhibit enough adhesive force to laminate with dielectric resin after the brown oxidation process. Originality/value MFAM, with the advantages of high efficiency and being a facile process, is developed to fabricate high-quality fine copper lines for industrial HDI PCB manufacture.

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