Fine Pitch Surface Mount Technology Assembly with Lead‐free, Low Residue Solder Paste

1995 ◽  
Vol 7 (2) ◽  
pp. 27-32 ◽  
Author(s):  
I. Artaki ◽  
A.M. Jackson ◽  
P.T. Vianco

Materials ◽  
2021 ◽  
Vol 14 (12) ◽  
pp. 3353
Author(s):  
Marina Makrygianni ◽  
Filimon Zacharatos ◽  
Kostas Andritsos ◽  
Ioannis Theodorakos ◽  
Dimitris Reppas ◽  
...  

Current challenges in printed circuit board (PCB) assembly require high-resolution deposition of ultra-fine pitch components (<0.3 mm and <60 μm respectively), high throughput and compatibility with flexible substrates, which are poorly met by the conventional deposition techniques (e.g., stencil printing). Laser-Induced Forward Transfer (LIFT) constitutes an excellent alternative for assembly of electronic components: it is fully compatible with lead-free soldering materials and offers high-resolution printing of solder paste bumps (<60 μm) and throughput (up to 10,000 pads/s). In this work, the laser-process conditions which allow control over the transfer of solder paste bumps and arrays, with form factors in line with the features of fine pitch PCBs, are investigated. The study of solder paste as a function of donor/receiver gap confirmed that controllable printing of bumps containing many microparticles is feasible for a gap < 100 μm from a donor layer thickness set at 100 and 150 μm. The transfer of solder bumps with resolution < 100 μm and solder micropatterns on different substrates, including PCB and silver pads, have been achieved. Finally, the successful operation of a LED interconnected to a pin connector bonded to a laser-printed solder micro-pattern was demonstrated.



1999 ◽  
Author(s):  
Jianbiao Pan ◽  
Gregory L. Tonkay

Abstract Stencil printing has been the dominant method of solder deposition in surface mount assembly. With the development of advanced packaging technologies such as ball grid array (BGA) and flip chip on board (FCOB), stencil printing will continue to play an important role. However, the stencil printing process is not completely understood because 52–71 percent of fine and ultra-fine pitch surface mount assembly defects are printing process related (Clouthier, 1999). This paper proposes an analytical model of the solder paste deposition process during stencil printing. The model derives the relationship between the transfer ratio and the area ratio. The area ratio is recommended as a main indicator for determining the maximum stencil thickness. This model explains two experimental phenomena. One is that increasing stencil thickness does not necessarily lead to thicker deposits. The other is that perpendicular apertures print thicker than parallel apertures.



2017 ◽  
Vol 2017 (1) ◽  
pp. 000201-000207 ◽  
Author(s):  
Youngtak Lee ◽  
Doug Link

Abstract Due to rapid growth of the microelectronics industry, packaged devices with small form factors, low costs, high power performance, and increased efficiency have become of high demand in the market. To realize the current market development trend, flip chip interconnection and System-in-Package (SiP) are some of the promising packaging solutions developed. However, a surprising amount of surface mount technology (SMT) defects are associated with the use of lead-free solder paste and methods by which the paste is applied. Two such defects are solder extrusion and tombstoning. Considerable amount of defects associated with solder overflow are found on chip-on-flip-chip (COFC) SiP in hearing aids. Through the use of design of experiments (DOE), lead-free solder defect causes on hearing aids application can be better understood and subsequently reduced or eliminated. This paper will examine the failure modes of solder extrusion and tombstoning that occurred when two different types of lead-free solders, Sn-Ag-Cu (SAC) and BiAgX were used within a SiP for attachment of surface mount devices (SMD) chip components for hearing aid applications. The practical application and analysis of lead-free solder for hearing aids will include the comprehensive failure analysis of the SMD components and compare the modeling and analysis of the two different solder types through the DOE process.



2016 ◽  
Vol 2016 (1) ◽  
pp. 000111-000116
Author(s):  
Youngtak Lee ◽  
Doug Link

Abstract Due to rapid growth of the microelectronics industry, packaged devices with small form factors, low costs, high power performance, and increased efficiency have become of high demand in the market. To realize the current market development trend, flip chip interconnection and System-in-Package (SiP) are some of the promising packaging solutions developed. However, a surprising amount of surface mount technology (SMT) defects are associated with the use of lead-free solder paste and methods by which the paste is applied. Two such defects are solder extrusion and tombstoning. Through the use of design of experiments (DOE), lead-free solder defect causes can be better understood and subsequently reduced or eliminated. This paper will examine the failure modes of solder extrusion and tombstoning that occurred when two different types of lead-free solders, Sn-Ag-Cu (SAC) and BiAgX were used within a SiP for attachment of surface mount devices (SMD) chip components. The systematic investigation will include the comprehensive failure analysis of the SMD components and compare the modeling and analysis of the two different solder types utilizing the design of experiments methods.



Materials ◽  
2014 ◽  
Vol 7 (12) ◽  
pp. 7706-7721 ◽  
Author(s):  
Mohd Rahman ◽  
Noor Zubir ◽  
Raden Leuveano ◽  
Jaharah Ghani ◽  
Wan Mahmood


Author(s):  
S. Manian Ramkumar ◽  
Krishnaswami Srihari

The electronics industry, in recent years, has been focusing primarily on product miniaturization and lead-free assembly. The need for product miniaturization is due to the continuous demand for portable electronic products that are multifunctional, yet smaller, faster, cheaper, and lighter. This is forcing the industry to design and assemble products with miniature passive and active devices. These devices typically have fine pitch footprints that provide a very small surface area for attachment. The solder attach technique relies primarily on the formation of intermetallics between the mating metallic surfaces. With a reduction in the surface area of the pads, the ratio of intermetallic to solder is very high once the solder joint is formed. This could result in unreliable solder joints, due to the brittle nature of intermetallics. In addition, the need to eliminate lead-based materials as a means of interconnection has renewed the industry’s interest in exploring other means of assembling surface mount devices reliably. This paper discusses the performance characteristics and preliminary research findings pertaining to a novel Anisotropic Conductive Adhesive (ACA) for electronics packaging applications, utilizing the Z Bond™ technology from Nexaura Systems, LLC. Typically, ACAs require the application of pressure during the curing process, to establish the electrical connection. The novel ACA uses a magnetic field to align the particles in the Z-axis direction and eliminates the need for pressure during curing. The formation of conductive columns within the polymer matrix provides a very high insulation resistance between adjacent conductors. The novel ACA also enables mass curing of the adhesive, eliminating the need for sequential assembly. The novel ACA’s I-V characteristics and performance under thermal and temperature-humidity aging are discussed in detail.



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