Electromigration modeling for integrated circuit interconnect reliability analysis

2001 ◽  
Vol 1 (1) ◽  
pp. 33-42 ◽  
Author(s):  
J.J. Clement
1993 ◽  
Vol 309 ◽  
Author(s):  
Jamie H. Rose ◽  
Terry Spooner

AbstractIt is well known that stress and electromigration induced voiding is of major concern for integrated circuit interconnect reliability. However, there has been little systematiccharacterization of void morphology and crystallography in ever more technologically important narrow, “near-bamboo” conducting lines. Prior reports indicate thatvoids are typically wedge or slit shaped, with failure often associated with slit voids.Void face habit plane is most often reported to be {111}. Wedge and slit void morphology and crystallography have been studied in comb/serpentine and parallel line array test structures. In virtually all cases, void faces are {111} oriented. In contrast to earlier studies, intragranular wedge stress voids have been observed. All electromigration opens were due to slit voids; these were typically intragranular, in contradiction to current theories of void formation, and likely are mechanical fractures. Under accelerated test conditions, non-grain boundary diffusion paths appear to operate at distances of tens of micrometers. Relative displacement between wedge voids and attached grain boundaries occurs where a wedge face lies on a near common {111} plane for the two grains. It is suggested that slit voids are intragranular under both stress and electromigration conditions and likely associated with local interconnect depassivation. Based solely on appearance and crystallography, no void can uniquely be identified as due to stress alone or electromigration alone.


1994 ◽  
Vol 337 ◽  
Author(s):  
A.G. Dirks ◽  
R.A. Augur ◽  
S. Kordić ◽  
R.A.M. Wolters

ABSTRACTDifficulty during plasma etching and post-etch corrosion are major drawbacks of Al-Si-Cu alloy films, when used for integrated circuit interconnect. Moreover, the relatively large solute mobility of Cu in Al may lead to void formation by precipitate coarsening. As integrated circuit dimensions decrease reliability issues, such as electromigration and mechanical stress voiding, are becoming increasingly important. At present several types of Al alloys are considered as possible alternatives for Al-Si-Cu: Al-Pd, Al-Sc, Al-Pd-Cu, Al-Si-Pd, Al-Si-V, Al-Si-Sc, Al-Si-Pd-Nb, and Al-Si-V-Pd. The latter quaternary alloy has been designed such as to combine the positive aspects of both Pd and V. In comparison with Cu in Al, a) the (low temperature) solid solubility is negligible for Pd and small for V, and b) the mobility is similar for Pd, but very small for V.With transmission-electron microscopy, passivated Al-Si-Cu alloy films have been studied after thermal stressing at 200 °C: ө-Al2Cu coarsening was observed together with void condensation. Lifetests on unpassivated Al-Si-V-Pd alloys at 180 °C and 2xl06A/cm2 have shown an extremely high resistance to electromigration. Electromigration and microstructural data on these quaternary alloys will be presented. These findings suggest how the microstructure is stabilized by the combined action of the V and Pd solute atoms, a) by nm-scale (A1,V) precipitates within the Al grains and b) by small (Al,Pd) particles at the Al grain boundaries. Furthermore, the key issues in terms of reliability related microstructural phenomena are both solute and solvent mobilities in grain interiors as well as along interfaces and grain boundaries. Arguments will be given showing that at low solute concentrations the metals (V and Pd) each by themselves are not effective enough to influence the solvent motion of aluminium along interfaces and grain boundaries significantly. The combination of the two metals, however, was found to be very effective.


1991 ◽  
Vol 225 ◽  
Author(s):  
D. T. Walton ◽  
H. J. Frost ◽  
C. V. Thompson

ABSTRACTMicrostructural evolution in thin-film strips is of interest due to the direct effect of grain structure on integrated circuit interconnect reliability and resistance to electromigration-induced failure. We have explored the evolution of interconnect grain structure via a two-dimensional grain growth simulation. We focus on the strip's transformation to the bamboo structure, in which individual grains traverse the width of the strip. We find that the approach to a fully bamboo structure is exponential, and that the rate of transformation is inversely proportional to the square of the strip width. When the simulation is extended to model grain boundary pinning due to grooving at grain boundary – free surface intersections, we find that there exists a maximum strip width to thickness ratio beyond which the transformation to the bamboo structure does not proceed to completion. By using our simulation results in conjunction with a “failure unit” model for electromigration-induced failure [4] we are able to reproduce the experimentally observed abrupt increase in time-to-failure below a critical strip width, and also model the reliability as a function of annealing conditions.


2014 ◽  
Vol 14 (1) ◽  
pp. 400-407 ◽  
Author(s):  
Yizhen Tian ◽  
Feifei He ◽  
Qi-Jun Zhang ◽  
Cher Ming Tan ◽  
Jianguo Ma

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