Integrated switched-capacitor-based cold-start circuit for DC-DC energy harvesters with wide input/output voltage range and low inductance in 40-nm CMOS

This work proposes a new OLED driver architecture with 10-bit segmented DAC and switched capacitor multiply-by-two circuit application. A 30-channel 10-bit switched capacitor driver chip prototype is implemented in 0.18-[Formula: see text]m CMOS technology. In this architecture, the achieved output range is 1.5–4.8[Formula: see text]V for an input range of 1.5–3.15[Formula: see text]V, which is suitable for OLED driver with different colors. This architecture is not only converting the digital input signal to analog output for the display panel but also giving amplified high output voltage range. In the segmented DAC, 6-bit coarse DAC and 4-bit fine DAC are used for the input voltage range 1.5–3.15[Formula: see text]V. In a conventional RDAC for the output voltage of 4.8[Formula: see text]V, it requires 2[Formula: see text] switches i.e., 14-bit RDAC for the same resolution. Hence, conventional RDAC driver is four times larger than the proposed innovative very compact and high speed 10-bit segmented DAC switched capacitor OLED driver. The new architecture drastically reduces the number of switches and complex metal routing which results in reduced power consumption and good settling time. In the proposed OLED driver, no extra buffer is required as switched capacitor op-amp is applied for the same purpose with a gain of more than one. This high-resolution design with small die area also improves the linearity and uniformity with low-power consumption. The post-simulated results show that the OLED driver exhibits the maximum DNL and INL of 0.03 LSB and [Formula: see text]0.06 LSB, respectively, with an LSB voltage of 3[Formula: see text]mV. The one-channel area is 0.586[Formula: see text]mm [Formula: see text] 0.017[Formula: see text]mm and the settling time is 4.25[Formula: see text][Formula: see text]s for 30[Formula: see text]k[Formula: see text] and 30[Formula: see text]pF driving load.

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A Recursive Switched-Capacitor DC-DC Converter Achieving $2^{N}-1$ Ratios With High Efficiency Over a Wide Output Voltage Range

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2014.2353791 ◽

2014 ◽

Vol 49 (12) ◽

pp. 2773-2787 ◽

Cited By ~ 41

Author(s):

Loai G. Salem ◽

Patrick P. Mercier

Keyword(s):

Output Voltage ◽

High Efficiency ◽

Switched Capacitor ◽

Voltage Range

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High-efficiency Bidirectional Buck–Boost Converter for Residential Energy Storage System

Energies ◽

10.3390/en12193786 ◽

2019 ◽

Vol 12 (19) ◽

pp. 3786 ◽

Cited By ~ 2

Author(s):

Seok-Hyeong Ham ◽

Yoon-Geol Choi ◽

Hyeon-Seok Lee ◽

Sang-Won Lee ◽

Su-Chang Lee ◽

...

Keyword(s):

Energy Storage ◽

Output Voltage ◽

High Efficiency ◽

Storage System ◽

Core Loss ◽

Input Voltage ◽

Switching Frequency ◽

Input Output ◽

Voltage Range ◽

Output Filter

This paper proposes a bidirectional dc–dc converter for residential micro-grid applications. The proposed converter can operate over an input voltage range that overlaps the output voltage range. This converter uses two snubber capacitors to reduce the switch turn-off losses, a dc-blocking capacitor to reduce the input/output filter size, and a 1:1 transformer to reduce core loss. The windings of the transformer are connected in parallel and in reverse-coupled configuration to suppress magnetic flux swing in the core. Zero-voltage turn-on of the switch is achieved by operating the converter in discontinuous conduction mode. The experimental converter was designed to operate at a switching frequency of 40–210 kHz, an input voltage of 48 V, an output voltage of 36–60 V, and an output power of 50–500 W. The power conversion efficiency for boost conversion to 60 V was ≥98.3% in the entire power range. The efficiency for buck conversion to 36 V was ≥98.4% in the entire power range. The output voltage ripple at full load was <3.59 Vp.p for boost conversion (60 V) and 1.35 Vp.p for buck conversion (36 V) with the reduced input/output filter. The experimental results indicate that the proposed converter is well-suited to smart-grid energy storage systems that require high efficiency, small size, and overlapping input and output voltage ranges.

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Analysis of Non-Minimum Phase System for AC/DC Battery Charger Power Factor Correction Converter

Applied Sciences ◽

10.3390/app12020868 ◽

2022 ◽

Vol 12 (2) ◽

pp. 868

Author(s):

Mahmoud Nassary ◽

Enric Vidal-Idiarte ◽

Javier Calvente

Keyword(s):

Power Factor ◽

Output Voltage ◽

Transfer Functions ◽

Dynamic Performance ◽

Harmonic Distortion ◽

Phase System ◽

Minimum Phase ◽

Input Output ◽

Voltage Range ◽

Battery Chargers

Electric mobility is nowadays one of the more important trends regarding pollution reduction and global warming due to fuel consumption. Big efforts are done in order to develop efficient and reliable power electronic systems for electric vehicles. In two stage on board-battery chargers, one way of improving efficiency is by means of ensuring the DC-DC isolated converter always operates in the nominal input/output voltage ratio, that could be achieved with a variable DC-link operation. In this paper, a four-switch buck-boost based AC/DC converter is deeply analyzed in order to improve its dynamic performance, the power factor and the total harmonic distortion. The converter suffers from a non-minimum phase characteristic in different input–output transfer functions, which reduces the closed-loop bandwidth of the system. Therefore, after a deep converter analysis has been done, different solutions have been evaluated and tested. Finally, a control to different output transfer functions of the converter become minimum phase, which allows us to increase the system bandwidth and, consequently, high power factor, low harmonics distortion, single control structure and fast dynamics for wide output voltage range are achieved.

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