Thermal characterisation of threshold voltage and short channel effect of thin film SOI MOSFET

Author(s):  
V. Aggarwal ◽  
R.S. Gupta
Author(s):  
Yuk L. Tsang ◽  
Xiang D. Wang ◽  
Reyhan Ricklefs ◽  
Jason Goertz

Abstract In this paper, we report a transistor model that has successfully led to the identification of a non visual defect. This model was based on detailed electrical characterization of a MOS NFET exhibiting a threshold voltage (Vt) of just about 40mv lower than normal. This small Vt delta was based on standard graphical extrapolation method in the usual linear Id-Vg plots. We observed, using a semilog plot, two slopes in the Id-Vg curves with Vt delta magnified significantly in the subthreshold region. The two slopes were attributed to two transistors in parallel with different Vts. We further found that one of the parallel transistors had short channel effect due to a punch-through mechanism. It was proposed and ultimately confirmed the cause was due to a dopant defect using scanning capacitance microscopy (SCM) technique.


2007 ◽  
Vol 91 (11) ◽  
pp. 113508 ◽  
Author(s):  
K. Tukagoshi ◽  
F. Fujimori ◽  
T. Minari ◽  
T. Miyadera ◽  
T. Hamano ◽  
...  

1996 ◽  
Vol 35 (Part 1, No. 2B) ◽  
pp. 996-1000 ◽  
Author(s):  
Risho Koh ◽  
Haruo Kato ◽  
Hiroshi Matsumoto

1999 ◽  
Vol 568 ◽  
Author(s):  
M.E. Rubin ◽  
S. Saha ◽  
J. Lutze ◽  
F. Nouri ◽  
G. Scott ◽  
...  

ABSTRACTExperiment shows that the reverse short channel effect (RSCE) in nMOS devices is critically impacted by the inclusion of nitrogen in the gate oxide. A higher concentration of nitrogen results in a lessened RSCE, i.e. more threshold voltage rolloff for smaller gate lengths. We propose that the additional nitrogen reduces the interstitial recombination rate at the interface, resulting in a smaller interstitial flux and therefore less transient enhanced diffusion (TED) of boron to that interface. To test this hypothesis, we simulate boron redistribution in one and two dimensional MOS capacitor structures, as well as full nMOS devices. We then present simulations calibrated to a 0.2 pim technology currently in production.


1991 ◽  
Vol 27 (11) ◽  
pp. 970-971 ◽  
Author(s):  
P. Smeys ◽  
A. Clerix ◽  
J.-P. Colinge

2006 ◽  
Vol 37 (1) ◽  
pp. 254 ◽  
Author(s):  
J. H. Park ◽  
W. J. Nam ◽  
J. H. Lee ◽  
M. K. Han ◽  
K. Y. Lee ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document