Design of High Frequency Low Power CMOS Dual-Output Current Conveyor at 32nm Technology Node

2010 ◽  
Author(s):  
Ale Imran ◽  
Mohd Hasan ◽  
M.W. Akram
Keyword(s):  
Low Power ◽  
High Frequency ◽  
Current Conveyor ◽  
Output Current ◽  
Technology Node ◽  
Low Power Cmos

Optoelectronic CMOS Transistors: Performance Advantages for Sub-7nm ULSI, RF ASIC, Memories, and Power MOSFETs

MRS Advances ◽  
2019 ◽  
Vol 4 (48) ◽  
pp. 2585-2591
Author(s):  
James N. Pan
Keyword(s):  
Low Power ◽  
High Voltage ◽  
Series Resistance ◽  
Access Time ◽  
Cmos Process ◽  
Output Current ◽  
Process Flow ◽  
Power Mosfets ◽  
Cmos Transistors ◽  
Low Power Cmos

AbstractSubstantial increase of output current, and Ion / Ioff ratio for sub-7nm low power CMOS transistors, can be accomplished using a novel optoelectronic technology, which is 100% compatible with existing CMOS process flow. For RF or mixed signal ASICs, adding photonic components may improve the cut-off frequency, and reduce series resistance. Products that utilize power regulating devices, such as power MOSFETs, will benefit from the optoelectronic configuration to achieve much lower Rdson and high voltage at the same time. For semiconductor memories, such as DRAM or FLASH, the photonic technique may reduce the ERASE / WRITE / access time and improve the reliability.

scholarly journals A Low Power CMOS Phase Frequency Detector in High Frequency PLL System

2018 ◽  
Vol 1049 ◽  
pp. 012059
Author(s):  
Fadhilah Binti Noor Al Amin ◽  
Nabihah Ahmad ◽  
M. Hairol Jabbar
Keyword(s):  
Low Power ◽  
High Frequency ◽  
Phase Frequency Detector ◽  
Low Power Cmos ◽  
Frequency Detector

LOW POWER FRACTIONAL-N FREQUENCY DIVIDER WITH IMPROVED RESOLUTION

2014 ◽  
Vol 23 (08) ◽  
pp. 1450112 ◽  
Author(s):  
V. MOHAMMED ZACKRIYA ◽  
JOHN REUBEN ◽  
ASHIM HARSH ◽  
HARISH M. KITTUR
Keyword(s):  
Low Power ◽  
High Frequency ◽  
Phase Error ◽  
Frequency Divider ◽  
Average Error ◽  
Technology Node ◽  
Frequency Dividers ◽  
Integer Division ◽  
Simulation Results ◽  
Ip Cores

Multiple clock domain (MCD) systems have different blocks/IP cores operating at different frequencies. These different clocks are generated from a high frequency clock usually by integer division. Fractional-N frequency dividers (FFDs) are needed when the clock required by a block in MCD system is not possible to be derived by simple integer division. In this paper, we present such a FFD with an improved resolution of (1/8). Post layout simulation results after parasitic RC extraction in the 90-nm technology node show that our FFD is able to fractionally divide signals upto 2 GHz frequency with an average error of 0.11% in division ratio even with 2.5° phase error at the input. Our FFD consumes 754 μW when fractionally dividing a 2 GHz signal with a resolution of (1/8).

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