Temperature compensation in bootstrapped current reference source

Author(s):  
Jingmei Lu ◽  
Yi Wang ◽  
Nuo Xu ◽  
Minglun Gao
2012 ◽  
Vol 21 (07) ◽  
pp. 1250059 ◽  
Author(s):  
L. F. SHI ◽  
Y. ZHAO ◽  
W. G. JIA ◽  
L. Y. CHENG ◽  
X. Q. LAI

A current reference with complex compensation using negative temperature coefficient of multiple currents is proposed. The principle of compensation is introduced in detail. This work generates two different compensated currents in the whole temperature range, which is different from the traditional curvature-compensated circuit. The compensation is achieved by using difference of the negative temperature coefficients. Piecewise curvature-compensation and higher order nonlinear temperature compensation are applied at the same time. The proposed circuit is simple and easy to implement. Results of simulation with HSPICE show that the achieved temperature coefficient is only 34.2 ppm/°C compared with 364 ppm/°C under 1 μm BCD process, which is unnecessary to compensate in the range of -25°C ∼ 125°C at 5 V supply voltage.


2014 ◽  
Vol 23 (03) ◽  
pp. 1450042 ◽  
Author(s):  
LIANG LIANG ◽  
ZHANGMING ZHU ◽  
YINTANG YANG

This paper proposes a novel second-order temperature-compensated CMOS current reference which exploits a new self-biased current source for first-order temperature compensation and a resistor-free widlar current mirror for second-order temperature compensation. Moreover, by deriving the temperature coefficient (TC) of the reference current, the temperature compensation condition equations together with a design method of minimizing the thermal drift in a required temperature range are presented. Based on these, the circuit is designed in a standard 0.18 μm CMOS process and achieves a very low TC of only 16.9 ppm/°C in a temperature range between -40°C and 120°C, with 1 μA reference current at 27°C. Besides, the current reference can operate at supply voltage down to 1.3 V, with a good supply regulation of 0.5%/V. At 27°C, its power consumption is 8.93 μW.


2014 ◽  
Vol 644-650 ◽  
pp. 3575-3578
Author(s):  
Zheng Da Li ◽  
Lin Xie

This paper designed a new band-gap voltage reference circuit with two-stage temperature compensation.It realizes non-linear temperature compensation by using NMOS-pipe leakage current and increases the power supply rejection ratio of the band-gap voltage reference source by introducing negative feedback between the operational amplifier and the power supply. What is more, the paper simulates the band-gap voltage reference source based on CSMC 0.5μm CMOS technique. The result as follow: the band-gap voltage reference source has the temperature coefficient of 8.2ppm/oC among-40-120oC with the supply voltage of 3V, the low-frequency power supply rejection ratio is 83dBat 27oC and the power supply rejection ratio is 71dB in 1KHz, the output voltage regulation is 1.05mV/V in the supply voltage range from 2.4V to 5V.


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