Combined subthreshold and gate-oxide leakage power reduction in deep-submicron CMOS Circuits

Author(s):  
R.S. Guindi
2001 ◽  
Vol 37 (12) ◽  
pp. 788 ◽  
Author(s):  
Shyh-Fann Ting ◽  
Yean-Kuen Fang ◽  
Chien-Hao Chen ◽  
Chih-Wei Yang ◽  
Mo-Chiun Yu ◽  
...  

2008 ◽  
Vol 48 (11-12) ◽  
pp. 1786-1790 ◽  
Author(s):  
Y.T. Chiang ◽  
Y.K. Fang ◽  
Y.J. Huang ◽  
T.H. Chou ◽  
S.Y. Yeh ◽  
...  

2014 ◽  
Vol 2 (4) ◽  
pp. 133-136 ◽  
Author(s):  
Khushboo Kumari ◽  
Arun Agarwal ◽  
J Jayvrat ◽  
Kabita Agarwal

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