Transient Thermal Characterization of Junction to Case Thermal Resistance for 2.5D Packages

2018 ◽  
Author(s):  
Hengyun Zhang ◽  
Yang Sui ◽  
Tingyu Lin ◽  
Haiyan Liu
Keyword(s):  
Thermal Resistance ◽  
Thermal Characterization ◽  
Transient Thermal

Transient Thermal Characterization of ErAs/In0.53Ga0.47As Thermoelectric Module

2007 ◽  
Author(s):  
Y. Ezzahri ◽  
R. Singh ◽  
K. Fukutani ◽  
Z. Bian ◽  
A. Shakouri ◽  
...  
Keyword(s):  
Metallic Nanoparticles ◽  
Thermoelectric Module ◽  
Thermal Characterization ◽  
Hot Electrons ◽  
Thermoelectric Power Factor ◽  
Scattering Centers ◽  
Network Identification ◽  
Transient Thermal

Embedded metallic nanoparticles in semiconductors have recently been proven to be of great interest for thermoelectric applications. These metallic nanoparticles play the role of scattering centers for phonons and a source of doping for electrons; they reduce simultaneously the thermal conductivity and increase the thermoelectric power factor of the semiconductor. It has also shown that metal/semiconductor heterostructures can be used to break the crystal momentum symmetry for hot electrons in thermionic devices, then increasing the number of electrons participating in transport. A thermoelectric module of 200 N-P pairs of InGaAlAs with embedded ErAs metallic nanoparticles has been fabricated. Network Identification by Deconvolution (NID) technique is then applied for transient thermal characterization of this thermoelectric module. The combination of this new representation of the dynamic behavior of the packaged device with high resolution thin film temperature measurement allows us to obtain information about heat transfer within the thermoelectric module. This is used to extract the thermal resistances and heat capacitances of the module.

Thermal Characterization of Two Opposing Carbon Nanotube Arrays Using Diffraction-Limited Infrared Microscopy

2005 ◽  
Author(s):  
Xuejiao Hu ◽  
Matt Panzer ◽  
Kenneth E. Goodson
Keyword(s):  
Thermal Resistance ◽  
Contact Region ◽  
Thermal Characterization ◽  
Interface Structure ◽  
Infrared Microscopy ◽  
Carbon Nanotube Arrays ◽  
Cnt Arrays ◽  
Significant Temperature ◽  
Resistance Value

Due to their extremely high thermal conductivity, carbon nanotubes (CNTs) have received many research interests for thermal management applications. An advanced thermal interface structure made by two opposing, partially over-lapped CNT arrays is designed for thermally connecting two contact surfaces. The performance of this interface structure is thermally characterized using diffraction-limited infrared microscopy. Significant temperature discontinuities are found at the end of the CNT-CNT contact region, which indicates a large thermal resistance between CNTs. Due to this inter-tube resistance, the thermal performance of the CNT-based interface structure is far below expectation, with a thermal resistance value of about 3.8 × 10−4 K·m2/W. Possible mechanisms of heat transfer between CNTs, which result in the large inter-tube resistance, are discussed.

Transient Thermal Characterization of a Stacked Multichip Package

2007 ◽  
Vol 4 (1) ◽  
pp. 23-30 ◽  
Author(s):  
Kimmo Kaija ◽  
Pekka Heino
Keyword(s):  
Steady State ◽  
Flip Chip ◽  
Thermal Characterization ◽  
Transient Behavior ◽  
Fe Model ◽  
Thermal Test ◽  
Transient Thermal ◽  
Temperature Responses

This paper is a case study of the thermal behavior of a stacked multichip package (SMCP). The aim is to measure temperature responses when heat is dissipated on different dice and to characterize the behavior with a compact thermal model (CTM) that accurately models steady-state and transient responses with a simple thermal RC -network. The measured package consists of three stacked layers, where each layer has one thinned flip chip attached die on an aramid interposer. The package's thermal responses were measured with thermal test dice that contain heaters and temperature sensors. The package was modeled with a finite element method (FEM) and the simulated temperature responses showed reasonable agreement with measured data. The FE model was further used to provide reference thermal data under different boundary conditions for CTM synthesis. The obtained CTM models accurately the steady-state and transient behavior and can be used as simplified model of the measured SMCP for further thermal analysis.

Transient thermal gratings at surfaces for thermal characterization of bulk materials and thin films

1995 ◽  
Vol 61 (3) ◽  
pp. 253-261 ◽  
Author(s):  
O.W. K�ding ◽  
H. Skurk ◽  
A.A. Maznev ◽  
E. Matthias
Keyword(s):  
Thin Films ◽  
Thermal Characterization ◽  
Bulk Materials ◽  
Transient Thermal

Transient Thermal Characterization of AlGaN/GaN HEMTs Grown on Silicon

2005 ◽  
Vol 52 (8) ◽  
pp. 1698-1705 ◽  
Author(s):  
J. Kuzmik ◽  
S. Bychikhin ◽  
M. Neuburger ◽  
A. Dadgar ◽  
A. Krost ◽  
...  
Keyword(s):  
Thermal Characterization ◽  
Gan Hemts ◽  
Transient Thermal

Characterization and Benchmarking of the Low Intertier Thermal Resistance of Three-Dimensional Hybrid Cu/Dielectric Wafer-to-Wafer Bonding

2017 ◽  
Vol 139 (1) ◽  
Author(s):  
Herman Oprins ◽  
Vladimir Cherman ◽  
Tomas Webers ◽  
Abdellah Salahouelhadj ◽  
Soon-Wook Kim ◽  
...  
Keyword(s):  
Thermal Resistance ◽  
Wafer Bonding ◽  
Three Dimensional ◽  
Measurement Data ◽  
Thermal Characterization ◽  
Test Chip ◽  
Thermal Test ◽  
Wafer Pair ◽  
Transient Measurement

In this paper, we present the design of a passive test chip with thermal test structures in the Metal 1 layer of the back-end of line (BEOL) for the experimental thermal characterization of the intertier thermal resistance of wafer-pairs fabricated by three-dimensional (3D) hybrid Cu/dielectric wafer-to-wafer (W2W) bonding. The thermal test structures include heater elements and temperature sensors. The steady-state or transient measurement data are combined with a modeling study to extract the thermal resistance of the bonded interface for the fabricated bonded wafer pair. The extracted thermal resistance of the die–die interface created by hybrid wafer-to-wafer bonding is compared to literature data for die-to-die (D2D) or die-to-wafer (D2W) stacking with microbumps. The low thermal resistance of the thin bonded dielectric interface indicates that hybrid Cu/dielectric bonding is a promising technology to create 3D chip stacks with a low thermal die-to-die resistance.

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