Failure analysis of Through-Silicon-Vias Aided by high-speed FIB silicon removal

Abstract This paper discusses the application of two different techniques for failure analysis of Cu through-silicon vias (TSVs), used in 3D stacked-IC technology. The first technique is GHz Scanning Acoustic Microscopy (GHz- SAM), which not only allows detection of defects like voids, cracks and delamination, but also the visualization of Rayleigh waves. GHz-SAM can provide information on voids, delamination and possibly stress near the TSVs. The second is a reflection-based photoelastic technique (SIREX), which is shown to be very sensitive to stress anisotropy in the Si near TSVs and as such also to any defect affecting this stress, such as delamination and large voids.

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High-speed wet etching of through silicon vias (TSVs) in micro- and nanoscale

2014 IEEE 64th Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc.2014.6897352 ◽

2014 ◽

Cited By ~ 3

Author(s):

Liyi Li ◽

Ching-Ping Wong

Keyword(s):

High Speed ◽

Wet Etching ◽

Through Silicon Vias ◽

Silicon Vias

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Failure analysis on the mechanical property of Through-Silicon Vias interface using a cohesive zone model

2016 17th International Conference on Electronic Packaging Technology (ICEPT) ◽

10.1109/icept.2016.7583372 ◽

2016 ◽

Author(s):

Ganglong Li ◽

Zhuo Chen ◽

Sen Cao ◽

Honglong Luo ◽

Liulu Jiang ◽

...

Keyword(s):

Mechanical Property ◽

Failure Analysis ◽

Cohesive Zone ◽

Cohesive Zone Model ◽

Zone Model ◽

Through Silicon Vias ◽

Silicon Vias

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Characterization and Failure Analysis of Wafer Bonded Devices and Unfilled Through-Silicon-Vias (TSVs)

ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2008p0368 ◽

2008 ◽

Author(s):

C. Cassidy ◽

J. Kraft ◽

G. Koppitsch ◽

E. Brandlhofer ◽

M. Steiner ◽

...

Keyword(s):

Sample Preparation ◽

Failure Analysis ◽

Semiconductor Devices ◽

3D Integration ◽

Through Silicon Vias ◽

Silicon Vias

Abstract This paper is concerned with characterization and failure analysis challenges posed by 3D integration of semiconductor devices, with a particular focus on wafer bonded components and Through Silicon Vias (TSV). Requirements for sample preparation are discussed, along with advantages and limitations exhibited by various different techniques. Analysis examples with real devices are presented, along with successful sample preparation solutions enabled by a precision polishing toolset.

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High Frequency Signal Propagation in Through Silicon Vias

International Symposium on Microelectronics ◽

10.4071/isom-2012-tp12 ◽

2012 ◽

Vol 2012 (1) ◽

pp. 000239-000243

Author(s):

Srinidhi Raghavan Narasimhan ◽

A. Ege Engin

Keyword(s):

Wave Propagation ◽

High Frequency ◽

High Speed ◽

Signal Propagation ◽

Successful Implementation ◽

High Frequency Signal ◽

3D Ic ◽

Through Silicon Vias ◽

Integration Technology ◽

Silicon Vias

The 3D IC integration technology and silicon interposers rely on through silicon vias (TSVs) for vertical interconnections. Hence, the medium carrying high frequency signals is lossy silicon (Si). Fundamental understanding of wave propagation through TSVs is essential for successful implementation of 3D IC integration technology as well as for the development of Si interposers at RF/microwave frequencies. The focus of this paper is characterization and modelling of TSVs and Si to explore high speed signal propagation through the lossy Si medium. To understand better the physical significance of the TSV, we will establish a framework for wave propagation through TSVs based on dielectric quasi-TEM, skin effect, and slow-wave modes similar to MIS micro-strip lines. For validation of the existence of these modes, full wave simulation results will be compared with simpler two dimensional transmission line simulators.

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