An analytical back gate bias dependent threshold voltage model for SiGe-channel ultra-thin SOI PMOS devices
1993 ◽
Vol 40
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pp. 2237-2244
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2016 ◽
Vol 45
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pp. 5367-5374
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1995 ◽
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pp. 1707-1709
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2000 ◽
Vol 40
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pp. 2107-2110
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2015 ◽
Vol 24
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pp. 35-43
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1999 ◽
Vol 39
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pp. 487-495
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2015 ◽
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2013 ◽
Vol 53
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pp. 363-370
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