Device-Optimization Technique for Robust and Low-Power FinFET SRAM Design in NanoScale Era

The increasing prominence of wireless multimedia systems and the need to limit power capability in very-high density VLSI chips have led to rapid and innovative developments in low-power design. Power reduction has emerged as a significant design constraint in VLSI design. The need for wireless multimedia systems leads to much higher power consumption than traditional portable applications. This paper presents possible optimization technique to reduce the energy consumption for wireless multimedia communication systems. Four topics are presented in the wireless communication systems subsection which deal with architectures such as PN acquisition, parallel correlator, matched filter and channel coding. Two topics include the IDCT and motion estimation in multimedia application.These topics consider algorithms and architectures for low power design such as using hybrid architecture in PN acquisition, analyzing the algorithm and optimizing the sample storage in parallel correlator, using complex matched filter that analog operational circuits controlled by digital signals, adopting bit serial arithmetic for the ACS operation in viterbi decoder, using CRC to adaptively terminate the SOVA iteration in turbo decoder, using codesign in RS codec, disabling the processing elements as soon as the distortion values become great than the minimum distortion value in motion estimation, and exploiting the relative occurrence of zero-valued DCT coefficient in IDCT.

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A New Sensitivity-Driven Process Variation Aware Self-Repairing Low-Power SRAM Design

2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems ◽

10.1109/vlsid.2014.27 ◽

2014 ◽

Cited By ~ 2

Author(s):

Nandakishor Yadav ◽

Sunil Dutt ◽

G.K. Sharma

Keyword(s):

Low Power ◽

Process Variation ◽

Sram Design

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Design of low power SRAM- based ubiquitous sensor for wireless body area networks

International Journal of Pervasive Computing and Communications ◽

10.1108/ijpcc-05-2021-0107 ◽

2021 ◽

Vol ahead-of-print (ahead-of-print) ◽

Author(s):

Kumar Neeraj ◽

Mohammed Mahaboob Basha ◽

Srinivasulu Gundala

Keyword(s):

Health Care ◽

Low Power ◽

Soft Errors ◽

Body Area Networks ◽

Wireless Body Area Networks ◽

Body Area ◽

Temperature Instability ◽

Content Type ◽

Bias Temperature Instability ◽

Sram Design

Purpose Smart ubiquitous sensors have been deployed in wireless body area networks to improve digital health-care services. As the requirement for computing power has drastically increased in recent years, the design of low power static RAM-based ubiquitous sensors is highly required for wireless body area networks. However, SRAM cells are increasingly susceptible to soft errors due to short supply voltage. The main purpose of this paper is to design a low power SRAM- based ubiquitous sensor for healthcare applications. Design/methodology/approach In this work, bias temperature instabilities are identified as significant issues in SRAM design. A level shifter circuit is proposed to get rid of soft errors and bias temperature instability problems. Findings Bias Temperature Instabilities are focused on in recent SRAM design for minimizing degradation. When compared to the existing SRAM design, the proposed FinFET-based SRAM obtains better results in terms of latency, power and static noise margin. Body area networks in biomedical applications demand low power ubiquitous sensors to improve battery life. The proposed low power SRAM-based ubiquitous sensors are found to be suitable for portable health-care devices. Originality/value In wireless body area networks, the design of low power SRAM-based ubiquitous sensors are highly essential. This design is power efficient and it overcomes the effect of bias temperature instability.

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