Effect of Drift Length on Shifts in 400-V SOI LDMOS Breakdown Voltage Due to TID

AbstractA RESURF-type JFET is a suitable structure as a lateral switching device with a breakdown voltage of above 600 V for an inverter module which drives motors of an electric or hybrid automobile. In this study, 600 V RESURF-type JFETs were fabricated to investigate the operation and characteristics. The drift region between the drain and the source areas has a double RESURF structure to reduce the on-resistance. At first, small devices were fabricated. The width and length of the channel are 200 μm and 10 μm, respectively. The distance between the drain and the gate areas, which is the drift length, is 15 μm. The saturation current normally-off device is about 0.6 mA at a gate voltage of 3 V. The specific on-resistance is about 160mωcm2. The maximum breakdown voltage is 720 V. Next, large ones were fabricated. The width of the channel is 80 mm. The saturation current normally-on device is about 0.5 A at a gate voltage of 2 V. The specific on-resistance is about 200mωcm2. The maximum breakdown voltage is 250 V.

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Dependence of breakdown voltage on drift length and buried oxide thickness in SOI RESURF LDMOS transistors

[1993] Proceedings of the 5th International Symposium on Power Semiconductor Devices and ICs ◽

10.1109/ispsd.1993.297121 ◽

2002 ◽

Cited By ~ 46

Author(s):

S. Merchant ◽

E. Arnold ◽

H. Baumgart ◽

R. Egloff ◽

T. Letavic ◽

...

Keyword(s):

Breakdown Voltage ◽

Oxide Thickness ◽

Buried Oxide ◽

Drift Length

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Dependence of breakdown voltage on drift length and linear doping gradients in SOI RESURF LDMOS devices

2009 9th International Conference on Electronic Measurement & Instruments ◽

10.1109/icemi.2009.5274655 ◽

2009 ◽

Cited By ~ 4

Author(s):

Shaoming Yang ◽

Wenchin Tseng ◽

Gene Sheu

Keyword(s):

Breakdown Voltage ◽

Drift Length

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The Investigation of Field Plate Design in 500 V High Voltage NLDMOS

Advances in Condensed Matter Physics ◽

10.1155/2015/834545 ◽

2015 ◽

Vol 2015 ◽

pp. 1-6

Author(s):

Donghua Liu ◽

Xiangming Xu ◽

Feng Jin ◽

Wenting Duan ◽

Huihui Wang ◽

...

Keyword(s):

Breakdown Voltage ◽

High Voltage ◽

Field Plate ◽

Plate Design ◽

Drift Length ◽

Drain Side ◽

Resistance Performance

This paper presents a 500 V high voltage NLDMOS with breakdown voltage (VBD) improved by field plate technology. Effect of metal field plate (MFP) and polysilicon field plate (PFP) on breakdown voltage improvement of high voltage NLDMOS is studied. The coeffect of MFP and PFP on drain side has also been investigated. A 500 V NLDMOS is demonstrated with a 37 μm drift length and optimized MFP and PFP design. Finally the breakdown voltage 590 V and excellent on-resistance performance (Rsp= 7.88 ohm * mm2) are achieved.

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Characteristics of Negative Lightning Impulse Breakdown Voltage in Pure Water

IEEJ Transactions on Fundamentals and Materials ◽

10.1541/ieejfms.138.441 ◽

2018 ◽

Vol 138 (8) ◽

pp. 441-448 ◽

Cited By ~ 3

Author(s):

Norimitsu Takamura ◽

Nobutaka Araoka ◽

Seiya Kamohara ◽

Yuta Hino ◽

Takuya Beppu ◽

...

Keyword(s):

Breakdown Voltage ◽

Pure Water ◽

Lightning Impulse

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Fundamental Considerations for CDM Failure in 90nm Products

ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2006p0055 ◽

2006 ◽

Author(s):

Nobuyuki Wakai ◽

Yuji Kobira ◽

Hidemitsu Egawa ◽

Masayoshi Tsutsumi

Keyword(s):

Breakdown Voltage ◽

High Speed ◽

Gate Oxide ◽

Critical Parameters ◽

Protection Device ◽

Oxide Breakdown ◽

Technology Products ◽

Charged Device ◽

Device Size ◽

Fundamental Consideration

Abstract Fundamental consideration for CDM (Charged Device Model) breakdown was investigated with 90nm technology products and others. According to the result of failure analysis, it was found that gate oxide breakdown was critical failure mode for CDM test. High speed triggered protection device such as ggNMOS and SCR (Thyristor) is effective method to improve its CDM breakdown voltage and an improvement for evaluated products were confirmed. Technological progress which is consisted of down-scaling of protection device size and huge number of IC pins of high function package makes technology vulnerable and causes significant CDM stress. Therefore, it is expected that CDM protection designing tends to become quite difficult. In order to solve these problems in the product, fundamental evaluations were performed. Those are a measurement of discharge parameter and stress time dependence of CDM breakdown voltage. Peak intensity and rise time of discharge current as critical parameters are well correlated their package capacitance. Increasing stress time causes breakdown voltage decreasing. This mechanism is similar to that of TDDB for gate oxide breakdown. Results from experiences and considerations for future CDM reliable designing are explained in this report.

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