Systematic co-optimization from chip design, process technology to systems for GPU AI chip

Author(s):  
John R Hu ◽  
James Chen ◽  
Boon-khim Liew ◽  
Yanfeng Wang ◽  
Lianxi Shen ◽  
...  
Author(s):  
Waseem Ahmed ◽  
Lisa Fan

Physical Design (PD) Data tool is designed mainly to help ASIC design engineers in achieving chip design process quality, optimization and performance measures. The tool uses data mining techniques to handle the existing unstructured data repository. It extracts the relevant data and loads it into a well-structured database. Data archive mechanism is enabled that initially creates and then keeps updating an archive repository on a daily basis. The logs information provide to PD tool is a completely unstructured format which parse by regular expression (regex) based data extraction methodology. It converts the input data into the structured tables. This undergoes the data cleansing process before being fed into the operational DB. PD tool also ensures data integrity and data validity. It helps the design engineers to compare, correlate and inter-relate the results of their existing work with the ones done in the past which gives them a clear picture of the progress made and deviations that occurred. Data analysis can be done using various features offered by the tool such as graphical and statistical representation.


2010 ◽  
Author(s):  
Stefan Häusler ◽  
Jana Blaschke ◽  
Christian Sebeke ◽  
Wolfgang Rosenstiel ◽  
Axel Hahn ◽  
...  

Author(s):  
Michael Keating ◽  
Pierre Bricaud

2010 ◽  
Vol 129-131 ◽  
pp. 1196-1200
Author(s):  
Xiao Zhen Mi ◽  
Feng Xiang Zhai ◽  
Wen Zhong Zhao

According to integration requirements of design, process and manufacturing in railway vehicle manufacturing enterprises, an integration solution centered at material quota and key technologies are proposed, which includes the data integration technology between PDM, CAPP, FastCut/Nest, ERP on the server layer; the Data Pre-process technology for design and process integration; the automatic nesting optimization technology meeting practical production requirements; the method to calculate material quota based on nesting optimized layouts; and the sharing of general NC codes. Considering automatic nesting optimization and material quota computing, a solution for split/combination data pre-processing and post-processing is proposed and implemented. And practical production conditions are taken into account in the nesting algorithm. All these technologies and solutions support the integration centered at material quota for design, process and manufacturing.


2008 ◽  
Vol 05 (03) ◽  
pp. 259-278 ◽  
Author(s):  
LINCOLN WOOD ◽  
QIANG LU

There are three distinct functions in the product realization chain — product design, process design, and process execution; thus there are two interfaces (product design — process design; process design — process execution) rather than one (product-manufacturing). Case studies of four organizations manufacturing high-tech products in New Zealand are explored to study the organization of process design functions and success strategies. Similarities in structuring, relationships between functional groups, and the methods for product and process design implementation are investigated. De-coupling of process design functions occurs best with high volume production with stable process technology — an infrequent situation with high-tech NZ manufacturers.


2020 ◽  
Vol 1 ◽  
pp. 551-558
Author(s):  
S. Faidi ◽  
A. Olechowski

AbstractCrucial in the design process, Technology Readiness Levels are a common form of technology maturity assessment. Studies suggest that the TRL scale can be subjective and biased. Automating the assessment can reduce human bias. This paper highlights important challenges of automation by presenting data collected on 15 technologies from the nanotechnology sector. Our findings show that, contrary to claims from the literature, patent data exists for low maturity technologies and may be useful for automation. We also found that there exists unexpected trends in data publications at TRL 2, 3 and 4.


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