ERSO short-channel IGFET model for CMOS LDD devices from long to deep-submicron channel lengths

Author(s):  
Jyh-Ren Wang ◽  
Pole-Shang Lin
1996 ◽  
Vol 428 ◽  
Author(s):  
Abhijit Phanse ◽  
Samar Saha

AbstractThis paper addresses hot-carrier related reliability issues in deep submicron silicon nMOSFET devices. In order to monitor the hot-carrier induced device degradation, the substrate current was measured for devices with varying channel lengths (20 um - 0.24 um) under various biasing conditions. Deep submicron devices experience velocity saturation of channel carriers due to extremely high lateral electric fields. To evaluate the effects of velocity saturation in the channel, the pinch-off length in the channel was extracted for all the devices of the target technology. It was observed that for very short channel devices, carriers in most of the channel experience velocity saturation and almost the entire channel gets pinched off. It is shown in this paper that for very short channel devices, the pinch-off length in the channel is limited by the effective channel length, and that velocity saturation effects are critical to the transport of channel carriers.


2005 ◽  
Vol 04 (05n06) ◽  
pp. 1021-1024 ◽  
Author(s):  
ABHINAV KRANTI ◽  
TSUNG MING CHUNG ◽  
JEAN-PIERRE RASKIN

A detailed analysis of static and dynamic characteristics of deep submicron double and single gate SOI MOSFETs is presented, based on 2D numerical simulations for high frequency analog applications. Results show that although DG MOSFET offers excellent performance with respect to short channel immunity and higher transconductance, it offers nearly two times the value of gate-to-source capacitance as compared to SG devices, thus limiting the cut-off frequency at higher gate voltages. At ultra short channel lengths and low gate overdrive voltages, DG devices show a significant improvement in cut-off frequency compared to SG devices, thus presenting DG nanotransistors as potential candidates for analog microwave applications.


2007 ◽  
Vol 12 (1) ◽  
pp. 36-37 ◽  
Author(s):  
R. H. Dennard ◽  
F. H. Gaensslen ◽  
H. N. Yu ◽  
V. L. Rideout ◽  
E. Bassous ◽  
...  

2020 ◽  
Vol 15 (1) ◽  
pp. 1-6
Author(s):  
Welder Fernandes Perina ◽  
João Antonio Martino ◽  
Paula Ghedini Der Agopian

This paper presents an evaluation of omega-gate nanowire n- and p-type SOI MOSFETs performance focusing on the main analog figures of merit. The different channel widths (WNW) and channel lengths (L) were also evaluated. These devices presented values of subthreshold slope near the theoretical limit at room temperature (60 mV/dec) and in the worst case a DIBL value smaller than 70 mV/V showing its immunity to short channel effects (SCEs) in the range studied. The narrowest device showed great electrostatic coupling, improving transconductance (gm), presenting an unit gain frequency over 200 GHz and intrinsic voltage gain over 80 dB. These values suggests that this device is capable of achieving good performance on new applications such as 5G communications and Internet-of-Things (IoT).


2019 ◽  
Vol 116 (11) ◽  
pp. 4843-4848 ◽  
Author(s):  
Jiawei Zhang ◽  
Joshua Wilson ◽  
Gregory Auton ◽  
Yiming Wang ◽  
Mingsheng Xu ◽  
...  

Despite being a fundamental electronic component for over 70 years, it is still possible to develop different transistor designs, including the addition of a diode-like Schottky source electrode to thin-film transistors. The discovery of a dependence of the source barrier height on the semiconductor thickness and derivation of an analytical theory allow us to propose a design rule to achieve extremely high voltage gain, one of the most important figures of merit for a transistor. Using an oxide semiconductor, an intrinsic gain of 29,000 was obtained, which is orders of magnitude higher than a conventional Si transistor. These same devices demonstrate almost total immunity to negative bias illumination temperature stress, the foremost bottleneck to using oxide semiconductors in major applications, such as display drivers. Furthermore, devices fabricated with channel lengths down to 360 nm display no obvious short-channel effects, another critical factor for high-density integrated circuits and display applications. Finally, although the channel material of conventional transistors must be a semiconductor, by demonstrating a high-performance transistor with a semimetal-like indium tin oxide channel, the range and versatility of materials have been significantly broadened.


2017 ◽  
Vol 2017 ◽  
pp. 1-8 ◽  
Author(s):  
Satyam Shukla ◽  
Sandeep Singh Gill ◽  
Navneet Kaur ◽  
H. S. Jatana ◽  
Varun Nehru

Technology scaling below 22 nm has brought several detrimental effects such as increased short channel effects (SCEs) and leakage currents. In deep submicron technology further scaling in gate length and oxide thickness can be achieved by changing the device structure of MOSFET. For 10–30 nm channel length multigate MOSFETs have been considered as most promising devices and FinFETs are the leading multigate MOSFET devices. Process parameters can be varied to obtain the desired performance of the FinFET device. In this paper, evaluation of on-off current ratio (Ion/Ioff), subthreshold swing (SS) and Drain Induced Barrier Lowering (DIBL) for different process parameters, that is, doping concentration (1015/cm3 to 1018/cm3), oxide thickness (0.5 nm and 1 nm), and fin height (10 nm to 40 nm), has been presented for 20 nm triangular FinFET device. Density gradient model used in design simulation incorporates the considerable quantum effects and provides more practical environment for device simulation. Simulation result shows that fin shape has great impact on FinFET performance and triangular fin shape leads to reduction in leakage current and SCEs. Comparative analysis of simulation results has been investigated to observe the impact of process parameters on the performance of designed FinFET.


2007 ◽  
Vol 51 (7) ◽  
pp. 1034-1038 ◽  
Author(s):  
Jongwook Jeon ◽  
Jong Duk Lee ◽  
Byung-Gook Park ◽  
Hyungcheol Shin

Sign in / Sign up

Export Citation Format

Share Document