Evaluation of Communication Induced Checkpointing in Resource Constrained Embedded Systems

2011 ◽  
Author(s):  
Belal H. Sababha ◽  
Osamah A. Rawashdeh
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Area Network ◽  
Resource Constrained ◽  
Promising Technique ◽  
Network Bandwidth ◽  
Resource Limited ◽  
Embedded Applications ◽  
And Task

Reconfiguration-Based Fault-Tolerance is one approach for developing dependable safety-critical embedded applications. This approach, compared to traditional hardware and software redundancy, is a promising technique that may achieve the required dependability with a significant reduction in cost in terms of size, weight, price, and power consumption. Reconfiguration necessitates using proper checkpointing protocols to support state reservation and task migration. One of the most common approaches is to use Communication Induced Checkpointing (CIC) protocols, which are well developed and understood for large parallel and information systems, but not much has been done for resource limited embedded systems. This paper implements four common CIC protocols in a resource constrained distributed embedded system with a Controller Area Network (CAN) backbone. An example feedback control system implementation is used for a case study. The four implemented protocols are described and performances are contrasted. The paper compares the protocols in terms of network bandwidth consumptions, CPU usages, checkpointing times, and checkpoint sizes in additional to the traditional measures of forced to local checkpoint rations and total number of checkpoints.

UML as Front-End Language for Embedded Systems Design

2010 ◽  
pp. 1-23
Author(s):  
Lisane Brisolara de Brisolara ◽  
Marcio Eduardo Kreutz ◽  
Luigi Carro
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Systems Design ◽  
Design Flow ◽  
Domain Specific ◽  
History Of ◽  
Uml Diagrams ◽  
The Embedded System ◽  
Definition Of

This chapter covers the use of UML as a modeling language for embedded systems design. It introduces the UML language, presenting the history of its definition, its main diagrams and characteristics. Using a case study, we show that using the standard UML with its limitations one is not able to model many important characteristics of embedded systems. For that reason, UML provides extension mechanisms that enable one to extend the language for a given domain, through the definition of profiles covering domain-specific applications. Several profiles have been proposed for the embedded systems domain, and some of those that have been standardized by OMG are presented here. A case study is also used to present MARTE, a new profile specifically proposed for the embedded system domain, enabling designers to model aspects like performance and schedulability. This chapter also presents a discussion about the effort to generate code from UML diagrams and analyses the open issues to the successful use of UML in the whole embedded system design flow.

Implementation of FastSLAM2.0 on an Embedded System and HIL Validation using Different Sensors Data

2015 ◽  
Vol 6 (2) ◽  
pp. 88-116
Author(s):  
Abouzahir Mohamed ◽  
Elouardi Abdelhafid ◽  
Bouaziz Samir ◽  
Latif Rachid ◽  
Tajer Abdelouahed
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Particle Filter ◽  
Real Time ◽  
Autonomous Navigation ◽  
Hardware In The Loop ◽  
Heterogeneous Architectures ◽  
Localization And Mapping ◽  
Embedded Applications ◽  
Robotic Applications

The improved particle filter based simultaneous localization and mapping (SLAM) has been developed for many robotic applications. The main purpose of this article is to demonstrate that recent heterogeneous architectures can be used to implement the FastSLAM2.0 and can greatly help to design embedded systems based robot applications and autonomous navigation. The algorithm is studied, optimized and evaluated with a real dataset using different sensors data and a hardware in the loop (HIL) method. Authors have implemented the algorithm on a system based embedded applications. Results demonstrate that an optimized FastSLAM2.0 algorithm provides a consistent localization according to a reference. Such systems are suitable for real time SLAM applications.

scholarly journals Implementation of master-slave method on multiprocessor-based embedded system: case study on mobile robot

2018 ◽  
Vol 7 (2.2) ◽  
pp. 53
Author(s):  
Agusma Wajiansyah ◽  
Hari Purwadi ◽  
Asrina Astagani ◽  
Supriadi Supriadi
Keyword(s):  
Embedded Systems ◽  
Mobile Robot ◽  
Embedded System ◽  
Execution Time ◽  
Experimental Results ◽  
Program Execution ◽  
Time Average ◽  
Single Processor ◽  
Number Of Iterations

In this research the master-slave method implemented on an embedded system using 3 processor applied to the mobile robot, to know the speed of program execution of robot. As a comparison is also used a robot with an embedded system based on single processor. From the experimental results, by applying the slave master method obtained the execution time of 546,5 μs and the number of iteration 1079, while for single processor-based system obtained execution time average 67828 μs and the amount of iteration average 147 times. Where the number of iterations is obtained by running the robot for 10 s. From this experiment, it can be concluded that there is a performance increase of 7.3% when compared to embedded systems based on single processor. 

PREDICTING FAULT-PRONE SOFTWARE MODULES IN EMBEDDED SYSTEMS WITH CLASSIFICATION TREES

2002 ◽  
Vol 09 (01) ◽  
pp. 1-16 ◽  
Author(s):  
TAGHI M. KHOSHGOFTAAR ◽  
EDWARD B. ALLEN
Keyword(s):  
Software Engineering ◽  
Embedded Systems ◽  
Embedded System ◽  
Software Quality ◽  
Software Metrics ◽  
Modern Society ◽  
Quality Model ◽  
Software Modules ◽  
Cart Algorithm

Embedded-computer systems have become essential to life in modern society. For example, the backbone of society's information infrastructure is telecommunications. Embedded systems must have highly reliable software, so that we avoid the severe consequences of failures, intolerable down-time, and expensive repairs in remote locations. Moreover, today's fast-moving technology marketplace mandates that embedded systems evolve, resulting in multiple software releases embedded in multiple products. Software quality models can be valuable tools for software engineering of embedded systems, because some software-enhancement techniques are so expensive or time-consuming that it is not practical to apply them to all modules. Targeting such enhancement techniques is an effective way to reduce the likelihood of faults discovered in the field. Research has shown software metrics to be useful predictors of software faults. A software quality model is developed using measurements and fault data from a past release. The calibrated model is then applied to modules currently under development. Such models yield predictions on a module-by-module basis. This paper examines the Classification And Regression Trees (CART) algorithm for building tree-based models that predict which software modules have high risk of faults to be discovered during operations. CART is attractive because it emphasizes pruning to achieve robust models. This paper presents details on the CART algorithm in the context of software engineering of embedded systems. We illustrate this approach with a case study of four consecutive releases of software embedded in a large telecommunications system. The level of accuracy achieved in the case study would be useful to developers of an embedded system. The case study indicated that this model would continue to be useful over several releases as the system evolves.

scholarly journals A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

2021 ◽  
Vol 11 (16) ◽  
pp. 7465
Author(s):  
Sabeen Masood ◽  
Shoab Ahmed Khan ◽  
Ali Hassan ◽  
Urooj Fatima
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Software Defined Radio ◽  
High Speed ◽  
Multiple Processors ◽  
Frame Work ◽  
Time Systems ◽  
Inter Process Communication

Recent years has seen a tremendous increase in processing requirements of present-day embedded system applications. Embedded systems consist of multiple processing elements (PEs) connected to each other using different types of interfaces. Many complicated tasks are accomplished by embedded systems in varied settings, which may introduce errors during inter-processor communication. Testing such systems is tremendously difficult and challenging from testing non-real time systems. A major part of testing real time embedded systems involves ensuring accuracy and timing in synchronous inter-process communication More specifically, the synchronization and inter-processor communication of real-time applications makes testing a challenging task and due to the demand for higher data rate increases, day-by-day, making testing of such systems even more complex. This paper presents a novel frame work that uses multiple instances of simulators with physical high-speed serial interfaces to emulate any real time embedded system communication. The framework presents a testing technique that detects all faults related to synchronization of high-speed synchronous serial interfaces in a systematic manner. The novelty of our approach is to simulate communication across multiple processors in a simulation environment for detecting and localizing bugs. We verify this framework using a case study consisting of an embedded software defined radio (SDR) system. The test results show the applicability of our approach in fixing bugs that relates to synchronization issues that otherwise are very hard to find and fix in very complicated systems, such as SDR.

scholarly journals Research on Embedded Multi-task Balancing Scheduling Algorithm

2018 ◽  
Vol 176 ◽  
pp. 01025
Author(s):  
Han Zhuangzhi ◽  
Ma Tianlin
Keyword(s):  
Operating System ◽  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Scheduling Algorithm ◽  
Task Decomposition ◽  
The Real ◽  
Time Performance ◽  
The Embedded System ◽  
And Task

For embedded systems, there are two cases of using an operating system and not using an operating system. When the real-time task is accomplished by the embedded system of the operating system, the task needs to meet certain conditions and occupy part of the processor's resources. Therefore, based on the method of event interruption, timed interruption and task decomposition, the real-time performance of the completion of the task of the embedded system is achieved. Finally, an embedded radar track compression scheduling algorithm is designed. It is proved through experiment that the track data can be compressed and transmitted in real time.

Compiler-Aided Run-Time Performance Speed-Up in Super-Scalar Processor

10.28945/3391 ◽  
2009 ◽  
Author(s):  
Moshe Pelleh
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Experimental Results ◽  
Medium Size ◽  
Organic System ◽  
Software Application ◽  
Organic Systems ◽  
Special Cases ◽  
Run Time

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.

scholarly journals Evaluating the Performance of Three Popular Web Mapping Libraries: A Case Study Using Argentina’s Life Quality Index

2020 ◽  
Vol 9 (10) ◽  
pp. 563
Author(s):  
Alejandro Zunino ◽  
Guillermo Velázquez ◽  
Juan Pablo Celemín ◽  
Cristian Mateos ◽  
Matías Hirsch ◽  
...  
Keyword(s):  
Life Quality ◽  
Web Technologies ◽  
Web Mapping ◽  
Network Bandwidth ◽  
Web Map ◽  
Raster Maps ◽  
Dynamic Web ◽  
Network Usage ◽  
Overall Performance

Recent Web technologies such as HTML5, JavaScript, and WebGL have enabled powerful and highly dynamic Web mapping applications executing on standard Web browsers. Despite the complexity for developing such applications has been greatly reduced by Web mapping libraries, developers face many choices to achieve optimal performance and network usage. This scenario is even more complex when considering different representations of geographical data (raster, raw data or vector) and variety of devices (tablets, smartphones, and personal computers). This paper compares the performance and network usage of three popular JavaScript Web mapping libraries for implementing a Web map using different representations for geodata, and executing on different devices. In the experiments, Mapbox GL JS achieved the best overall performance on mid and high end devices for displaying raster or vector maps, while OpenLayers was the best for raster maps on all devices. Vector-based maps are a safe bet for new Web maps, since performance is on par with raster maps on mid-end smartphones, with significant less network bandwidth requirements.

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