Influence of mechanical bending strain on bias-stress stability of flexible top-gate p-type SnO TFTs

Author(s):  
I-Chun Cheng ◽  
Shu-Ming Hsu ◽  
Wei-Chen Lin ◽  
Jian-Zhang Chen
2019 ◽  
Vol 28 (8) ◽  
pp. 088502
Author(s):  
Chao-Yang Han ◽  
Yuan Liu ◽  
Yu-Rong Liu ◽  
Ya-Yi Chen ◽  
Li Wang ◽  
...  

Electronics ◽  
2019 ◽  
Vol 8 (2) ◽  
pp. 249 ◽  
Author(s):  
Mario Barra ◽  
Fabio Chiarella ◽  
Federico Chianese ◽  
Ruggero Vaglio ◽  
Antonio Cassinese

Core-cyanated perylene diimide (PDI_CY) derivatives are molecular compounds exhibiting an uncommon combination of appealing properties, including remarkable oxidative stability, high electron affinities, and excellent self-assembling properties. Such features made these compounds the subject of study for several research groups aimed at developing electron-transporting (n-type) devices with superior charge transport performances. After about fifteen years since the first report, field-effect transistors based on PDI_CY thin films are still intensely investigated by the scientific community for the attainment of n-type devices that are able to balance the performances of the best p-type ones. In this review, we summarize the main results achieved by our group in the fabrication and characterization of transistors based on PDI8-CN2 and PDIF-CN2 molecules, undoubtedly the most renowned compounds of the PDI_CY family. Our attention was mainly focused on the electrical properties, both at the micro and nanoscale, of PDI8-CN2 and PDIF-CN2 films deposited using different evaporation techniques. Specific topics, such as the contact resistance phenomenon, the bias stress effect, and the operation in liquid environment, have been also analyzed.


2016 ◽  
Vol 37 (8) ◽  
pp. 1010-1013 ◽  
Author(s):  
Bo-Wei Chen ◽  
Ting-Chang Chang ◽  
Yu-Ju Hung ◽  
Shin-Ping Huang ◽  
Po-Yung Liao ◽  
...  

2004 ◽  
Vol 815 ◽  
Author(s):  
Sumi Krishnaswami ◽  
Mrinal K. Das ◽  
Anant K. Agarwal ◽  
John W. Palmour

AbstractTDDB measurements of NMOS capacitor fabricated with 1200°C dry oxide with 1300°C N2O anneal were performed at 175°C and 300°C under high positive bias stress. The devices are biased into strong accumulation mode such that the field in the oxide is high enough to collect breakdown data in a reasonable period of time. We observe that at 175°C, a 100-year Mean Time to Failure (MTTF) is obtained at an electric field of 3 MV/cm in the oxide. The TDDB measurement has also been performed at 300°C where lifetime has been reduced by a few orders of magnitude, but with an acceptable 100-year MTTF. Recent reliability results on similarly oxidized MOSFETs have shown failures along the same trend as the n-type capacitors, indicating that MOSFETs and MOS capacitors can have similar reliability despite inherent processing and structural differences. PMOS capacitors fabricated with the aforementioned dry + N2O process as well as capacitors fabricated using the low DIT nitridation techniques show acceptable MTTF of 100 years at the nominal operating electric field of 3 MV/cm.


2013 ◽  
Vol 34 (5) ◽  
pp. 647-649 ◽  
Author(s):  
Ick-Joon Park ◽  
Chan-Yong Jeong ◽  
Myeonghun U ◽  
Sang-Hun Song ◽  
In-Tak Cho ◽  
...  

2016 ◽  
Vol 37 (4) ◽  
pp. 385-388 ◽  
Author(s):  
M. Tapajna ◽  
O. Hilt ◽  
E. Bahat-Treidel ◽  
J. Wurfl ◽  
J. Kuzmik
Keyword(s):  

Author(s):  
Ayoub Abdulhafith Sadek Zumeit ◽  
Abhishek S Dahiya ◽  
Adamos Christou ◽  
Ravinder Dahiya

Abstract lexible electronics with high-performance devices is crucial for transformative advances in several emerging and traditional applications. To address this need, herein we present p-type silicon (Si) nanoribbons (NR)-based high-performance field-effect transistors (FETs) developed using innovative Direct Roll Transfer Stamping (DRTS) process. First, ultrathin Si NRs (~70 nm) are obtained from silicon on insulator (SOI) wafers using conventional top-down method, and then DRTS method is employed to directly place the NRs onto flexible substrates at room temperature (RT). The NRFETs are then developed following RT fabrication process which include deposition of high-quality SiNx dielectric. The fabricated p-channel transistors demonstrate high linear mobility ~100±10 cm2/Vs, current on/off ratio >10^4, and low gate leakage (<1nA). Further, the transistors showed robust device performance under mechanical bending and at wide temperature range (15 to 90 °C), showing excellent potential for futuristic high-performance flexible electronic devices/circuits.


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