scholarly journals High performance p-channel transistors on flexible substrate using direct roll transfer stamping

2021 ◽  
Author(s):  
Ayoub Abdulhafith Sadek Zumeit ◽  
Abhishek S Dahiya ◽  
Adamos Christou ◽  
Ravinder Dahiya
Keyword(s):  
High Performance ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Flexible Substrate ◽  
Electronic Devices ◽  
Silicon On Insulator ◽  
Flexible Substrates ◽  
Device Performance ◽  
Mechanical Bending ◽  
P Type

Abstract lexible electronics with high-performance devices is crucial for transformative advances in several emerging and traditional applications. To address this need, herein we present p-type silicon (Si) nanoribbons (NR)-based high-performance field-effect transistors (FETs) developed using innovative Direct Roll Transfer Stamping (DRTS) process. First, ultrathin Si NRs (~70 nm) are obtained from silicon on insulator (SOI) wafers using conventional top-down method, and then DRTS method is employed to directly place the NRs onto flexible substrates at room temperature (RT). The NRFETs are then developed following RT fabrication process which include deposition of high-quality SiNx dielectric. The fabricated p-channel transistors demonstrate high linear mobility ~100±10 cm2/Vs, current on/off ratio >10^4, and low gate leakage (<1nA). Further, the transistors showed robust device performance under mechanical bending and at wide temperature range (15 to 90 °C), showing excellent potential for futuristic high-performance flexible electronic devices/circuits.

Dirac-source field-effect transistors as energy-efficient, high-performance electronic switches

Science ◽  
2018 ◽  
Vol 361 (6400) ◽  
pp. 387-392 ◽  
Author(s):  
Chenguang Qiu ◽  
Fei Liu ◽  
Lin Xu ◽  
Bing Deng ◽  
Mengmeng Xiao ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Field Effect ◽  
Electron Density Distribution ◽  
High Performance ◽  
Room Temperature ◽  
Supply Voltage ◽  
Field Effect Transistors ◽  
State Of The Art ◽  
Electronic Devices ◽  
Electronic Switches

An efficient way to reduce the power consumption of electronic devices is to lower the supply voltage, but this voltage is restricted by the thermionic limit of subthreshold swing (SS), 60 millivolts per decade, in field-effect transistors (FETs). We show that a graphene Dirac source (DS) with a much narrower electron density distribution around the Fermi level than that of conventional FETs can lower SS. A DS-FET with a carbon nanotube channel provided an average SS of 40 millivolts per decade over four decades of current at room temperature and high device current I60 of up to 40 microamperes per micrometer at 60 millivolts per decade. When compared with state-of-the-art silicon 14-nanometer node FETs, a similar on-state current Ion is realized but at a much lower supply voltage of 0.5 volts (versus 0.7 volts for silicon) and a much steeper SS below 35 millivolts per decade in the off-state.

High performance electronic devices based on nanofibers via a crosslinking welding process

Nanoscale ◽  
2018 ◽  
Vol 10 (41) ◽  
pp. 19427-19434 ◽  
Author(s):  
Youchao Cui ◽  
You Meng ◽  
Zhen Wang ◽  
Chunfeng Wang ◽  
Guoxia Liu ◽  
...  
Keyword(s):  
Contact Resistance ◽  
Epoxy Resin ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Electronic Devices ◽  
Welding Process ◽  
Device Performance ◽  
Adhesion Performance

An amine-hardened epoxy resin was selected as adhesion agent to weld nanofiber and improve the adhesion performance, resulting in low contact-resistance nanofiber networks (NFNs). The field-effect transistors based on In2O3 NFNs/SiO2 exhibit high device performance.

scholarly journals High Performance Field-Effect Transistors Based on Partially Suspended 2D Materials via Block Copolymer Lithography

Polymers ◽  
2021 ◽  
Vol 13 (4) ◽  
pp. 566
Author(s):  
Simon Kim ◽  
Su Eon Lee ◽  
Jun Hyun Park ◽  
Jin Yong Shin ◽  
Bom Lee ◽  
...  
Keyword(s):  
Block Copolymer ◽  
Self Assembly ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
2D Materials ◽  
Electronic Devices ◽  
Great Promise ◽  
Substrate Effect ◽  
Device Performance

Although various two-dimensional (2D) materials hold great promise in next generation electronic devices, there are many challenges to overcome to be used in practical applications. One of them is the substrate effect, which directly affects the device performance. The large interfacial area and interaction between 2D materials and substrate significantly deteriorate the device performance. Several top-down approaches have been suggested to solve the problem. Unfortunately, however, they have some drawbacks such as a complicated fabrication process, a high production cost, or a poor mechanical property. Here, we suggest the partially suspended 2D materials-based field-effect transistors (FETs) by introducing block copolymer (BCP) lithography to fabricate the substrate effect-free 2D electronic devices. A wide range of nanometer size holes (diameter = 31~43 nm) is successfully realized with a BCP self-assembly nanopatterning process. With this approach, the interaction mechanism between active 2D materials and substrate is elucidated by precisely measuring the device performance at varied feature size. Our strategy can be widely applied to fabricate 2D materials-based high performance electronic, optoelectronic, and energy devices using a versatile self-assembly nanopatterning process.

scholarly journals Nanonet: Low-temperature-processed tellurium nanowire network for scalable p-type field-effect transistors and a highly sensitive phototransistor array

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Muhammad Naqi ◽  
Kyung Hwan Choi ◽  
Hocheon Yoo ◽  
Sudong Chae ◽  
Bum Jun Kim ◽  
...  
Keyword(s):  
Low Temperature ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Optical Measurements ◽  
Electrical Performance ◽  
Large Area ◽  
Nanowire Network ◽  
P Type ◽  
Nanowire Networks

AbstractLow-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.

scholarly journals 2,2'-(Arylenedivinylene)bis-8-hydroxyquinolines exhibiting aromatic π-π stacking interactions as solution-processable p-type organic semiconductors for high-performance organic field effect transistors

2021 ◽  
Author(s):  
Suman Yadav ◽  
Shivani Sharma ◽  
Satinder K Sharma ◽  
Chullikkattil P. Pradeep
Keyword(s):  
Organic Semiconductors ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Organic Field Effect Transistors ◽  
Organic Thin Film ◽  
Effect Transistor ◽  
Solution Processable ◽  
P Type

Solution-processable organic semiconductors capable of functioning at low operating voltages (~5 V) are in demand for organic field-effect transistor (OFET) applications. Exploration of new classes of compounds as organic thin-film...

scholarly journals Effect of Microwave Processing and Glass Inclusions on Thermoelectric Properties of P-Type Bismuth Antimony Telluride Alloys for Wearable Applications

Energies ◽  
2020 ◽  
Vol 13 (17) ◽  
pp. 4524
Author(s):  
Amin Nozariasbmarz ◽  
Daryoosh Vashaee
Keyword(s):  
Seebeck Coefficient ◽  
Thermoelectric Materials ◽  
Room Temperature ◽  
Electronic Devices ◽  
Microwave Processing ◽  
Glass Inclusion ◽  
Wearable Electronic ◽  
P Type ◽  
Wearable Electronic Devices ◽  
Body Heat

Depending on the application of bismuth telluride thermoelectric materials in cooling, waste heat recovery, or wearable electronics, their material properties, and geometrical dimensions should be designed to optimize their performance. Recently, thermoelectric materials have gained a lot of interest in wearable electronic devices for body heat harvesting and cooling purposes. For efficient wearable electronic devices, thermoelectric materials with optimum properties, i.e., low thermal conductivity, high Seebeck coefficient, and high thermoelectric figure-of-merit (zT) at room temperature, are demanded. In this paper, we investigate the effect of glass inclusion, microwave processing, and annealing on the synthesis of high-performance p-type (BixSb1−x)2Te3 nanocomposites, optimized specially for body heat harvesting and body cooling applications. Our results show that glass inclusion could enhance the room temperature Seebeck coefficient by more than 10% while maintaining zT the same. Moreover, the combination of microwave radiation and post-annealing enables a 25% enhancement of zT at room temperature. A thermoelectric generator wristband, made of the developed materials, generates 300 μW power and 323 mV voltage when connected to the human body. Consequently, MW processing provides a new and effective way of synthesizing p-type (BixSb1−x)2Te3 alloys with optimum transport properties.

Sub-5 nm monolayer germanium selenide (GeSe) MOSFETs: towards a high performance and stable device

Nanoscale ◽  
2020 ◽  
Vol 12 (28) ◽  
pp. 15443-15452
Author(s):  
Ying Guo ◽  
Feng Pan ◽  
Gaoyang Zhao ◽  
Yajie Ren ◽  
Binbin Yao ◽  
...  
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Device Performance ◽  
Gate Length ◽  
Germanium Selenide ◽  
Technology Roadmap

ML GeSe field-effect transistors have an excellent device performance, even at the 1 nm gate-length. The on-state current of the devices can fulfill the requirements of the International Technology Roadmap for Semiconductors (2013 version).

Hg1−x−yMnxCdyTe Alloys for 1.3−1.8 μm Photodiode Applications

1986 ◽  
Vol 89 ◽  
Author(s):  
S. H. Shin ◽  
J. G. Pasko ◽  
D. S. Lo ◽  
W. E. Tennant ◽  
J. R. Anderson ◽  
...  
Keyword(s):  
Liquid Phase ◽  
Liquid Phase Epitaxy ◽  
Room Temperature ◽  
Reverse Bias ◽  
Fiber Optic ◽  
Superior Performance ◽  
Device Performance ◽  
Device Structure ◽  
Cdte Substrate ◽  
P Type

AbstractHgMnCdTe/CdTe photodiodes with responsivity cutoffs of up to 1.54 pm have been fabricated by liquid phase epitaxy (LPE). The mesa device structure consists of a boron-implanted mosaic fabricated on a p-type Hg1−x−yMnxCdyTe layer grown on a CdTe substrate. A reverse breakdown voltage (VB) of 50 V and a leakage current density of 1.5 × 10−4 A/cm2 at V = −10 V was measured at room temperature (295K). A 0.75 pF capacitance was also measured under a 5 V reverse bias at room temperature. This device performance based on the quaternary HgMnCdTe shows both theoretical and practical promise of superior performance for wavelengths in the range 1.3 to 1.8 μm for fiber optic applications.

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