PERFORMANCE OF MOSFETs ON REACTIVE-ION-ETCHED GaN SURFACES

2009 ◽  
Vol 19 (01) ◽  
pp. 121-127 ◽  
Author(s):  
KE TANG ◽  
WEIXIAO HUANG ◽  
T. PAUL CHOW
Keyword(s):  
Field Effect ◽  
Annealing Temperature ◽  
Gate Oxide ◽  
Subthreshold Swing ◽  
Field Effect Mobility ◽  
Annealing Temperatures ◽  
Enhancement Mode ◽  
Optimal Annealing Temperature

We have fabricated, characterized and compared the performance of lateral enhancement-mode GaN MOSFETs on as-grown and RIE-etched surfaces with 900 and 1000°C gate oxide annealing temperatures. Both subthreshold swing and field effect mobility show 1000°C is the optimal annealing temperature for the PECVD gate oxide in our MOSFET process.

Process Optimisation for 4H-SiC MOSFET Applications

2006 ◽  
Vol 527-529 ◽  
pp. 1051-1054 ◽  
Author(s):  
Caroline Blanc ◽  
Dominique Tournier ◽  
Phillippe Godignon ◽  
D.J. Brink ◽  
Véronique Soulière ◽  
...  
Keyword(s):  
Field Effect ◽  
Oxidation Process ◽  
Gate Oxide ◽  
Process Optimisation ◽  
Field Effect Mobility ◽  
Oxide Formation ◽  
Step Procedure ◽  
P Type ◽  
Peak Value ◽  
Gas Precursor

We report on 4H-SiC MOSFET devices implemented on p-type <11-20>-oriented epitaxial layers, using a two-step procedure for gate oxide formation. First is a thin, dry, thermal SiO2 layer grown at 1050°C for 1 hour. Next, is a thick (50 nm) layer of complementary oxide deposited by PECVD using TEOS as gas precursor. With respect to the standard thermal oxidation process, this results in much improvement of the field effect mobility. For the best samples, we find a peak value in the range of 330 cm2/Vs while, on the full wafer, an average mobility of about 160 cm2/Vs is found. Up to now, this is one of the best results ever reported for 4H-SiC MOSFETs.

Field Effect Mobility in n-Channel Si Face 4H-SiC MOSFET with Gate Oxide Grown on Aluminium Ion-Implanted Material

2005 ◽  
pp. 833-836
Author(s):  
G. Gudjónsson ◽  
H.Ö. Ólafsson ◽  
Fredrik Allerstam ◽  
Per Åke Nilsson ◽  
Einar O. Sveinbjörnsson ◽  
...  
Keyword(s):  
Field Effect ◽  
Gate Oxide ◽  
Field Effect Mobility ◽  
Aluminium Ion ◽  
Ion Implanted

Thin Film Transistors on Plastic Substrates Using Silicon Deposited by Microwave ECR-CVD

2003 ◽  
Vol 769 ◽  
Author(s):  
Lihong Teng ◽  
Wayne A. Anderson
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Silicon Films ◽  
Subthreshold Swing ◽  
Field Effect Mobility ◽  
Current Ratio ◽  
Saturation Field ◽  
Plastic Substrates

AbstractThe properties of thin film transistors (TFT's) on plastic substrates with active silicon films deposited by microwave ECR-CVD were studied. Two types of plastic were used, PEEK and polyimide. The a-Si:H TFT deposited at 200°C on polyimide substrates showed a saturation field effect mobility of 4.5 cm2/V-s, a threshold voltage of 3.7 V, a subthreshold swing of 0.69 V/dec and an ON/OFF current ratio of 7.9×106, while the TFT fabricated on PEEK at 200°C showed a saturation field effect mobility of 3.9 cm2/V-s, a threshold voltage of 4.1 V, a subthreshold swing of 0.73 V/dec and an ON/OFF current ratio of 4×106. Comparison is made to TFT's with the Si deposited at 400°C on glass.

High field-effect mobility in n-channel Si face 4H-SiC MOSFETs with gate oxide grown on aluminum ion-implanted material

2005 ◽  
Vol 26 (2) ◽  
pp. 96-98 ◽  
Author(s):  
G. Gudjonsson ◽  
H.O. Olafsson ◽  
F. Allerstam ◽  
P.-A. Nilsson ◽  
E.O. Sveinbjornsson ◽  
...  
Keyword(s):  
Field Effect ◽  
High Field ◽  
Gate Oxide ◽  
Field Effect Mobility ◽  
Aluminum Ion ◽  
Ion Implanted

Influence of Post-Implantation Annealing Temperature on MOSFET Performance and Oxide Reliability

2013 ◽  
Vol 740-742 ◽  
pp. 703-706
Author(s):  
Michael Grieb ◽  
Stefan Noll ◽  
Dick Scholten ◽  
Martin Rambach
Keyword(s):  
Applied Field ◽  
Field Effect ◽  
Annealing Temperature ◽  
Annealed Sample ◽  
Field Effect Mobility ◽  
Oxide Reliability ◽  
Order Of Magnitude ◽  
Maximum Field ◽  
Post Implantation

In the present work, we studied the influence of the post-implantation annealing temperature on the performance and oxide reliability of lateral 4H-SiC MOSFETs. The maximum field effect mobility of the MOSFETs at 25°C decreases from 22.4cm2/Vs to 17.2cm2/Vs by increasing annealing temperature from 1600°C to 1800°C. Respectively, the measured meantime to failure is about one order of magnitude higher for the 1700°C annealed sample at an applied field of 8.5MV/cm compared to the 1600°C and 1800°C annealed samples.

Single-Crystal Thin Film Transistor by Grain-Filter Location-Controlled Excimer-Laser Crystallization

2001 ◽  
Vol 685 ◽  
Author(s):  
Barry D. van Dijk ◽  
Paul Ch. Van der Wilt ◽  
G. J. Bertens ◽  
Lis.K. Nanver ◽  
Ryoichi Ishihara
Keyword(s):  
Thin Film ◽  
Chemical Mechanical Polishing ◽  
Field Effect ◽  
Thin Film Transistor ◽  
Subthreshold Swing ◽  
Filter Method ◽  
Field Effect Mobility ◽  
Laser Crystallization ◽  
Excimer Laser Crystallization ◽  
Grain Filters

AbstractThin film transistors (TFTs) are fabricated inside a large, location-controlled, silicon grain, fabricated with the grain-filter method. In a first experiment TFTs with high field-effect mobility for electrons of 430 cm2/Vs are fabricated. The off-current and subthreshold swing have high values of 60 pA and 1.2 V/dec, respectively. The grain-filter is improved by doping the channel and by planarizing the grain-filter by chemical mechanical polishing (CMP). TFTs fabricated in CMP-planarized grain-filters have mobility, off-current, and subthreshold swing of 430 cm2/Vs, 0.3 pA, and 0.29 V/dec, respectively, which compares well with the characteristics for SOI TFTs.

Thermal Annealing Effect on the Thermal and Electrical Properties of Organic Semiconductor Thin Films

MRS Advances ◽  
2016 ◽  
Vol 1 (22) ◽  
pp. 1637-1643 ◽  
Author(s):  
Xinyu Wang ◽  
Boyu Peng ◽  
Paddy Chan
Keyword(s):  
Thermal Conductivity ◽  
Electrical Properties ◽  
Thermal Annealing ◽  
Organic Semiconductor ◽  
Field Effect ◽  
Annealing Temperature ◽  
Waste Heat ◽  
Annealing Effect ◽  
Field Effect Mobility ◽  
Thermal And Electrical Properties

ABSTRACTThe thermal and electrical properties of organic semiconductor are playing critical roles in the device applications especially on the devices with large area. Although the effect may be minor in a single device like field effect transistors, the unwanted waste heat would cause much more severe problems in large-scale devices as the power density will go up significantly. The waste heat would lead to performance degradation or even failure of the devices, and thus a more detailed study on the thermal conductivity and carrier mobility of the organic thin film would be beneficial to predict the limits of the device or design a thermally stable device. Here we explore the thermal annealing effect on the thermal and electrical properties of the small molecule organic semiconductor, dinaphtho[2,3-b:2’,3’-f]thieno[3,2-b]thiophene (DNTT). After the post deposition thermal annealing, the grain size of the film increases and in-plane crystallinity improves while cross-plane crystallinity keeps relatively constant. We demonstrated the cross-plane thermal conductivity is independent of the thermal annealing temperature and high annealing temperature will reduce the space-charge-limited current (SCLC) mobility. When the annealing temperature increase from 24 °C to 140 °C, the field effect mobility shows a gradual increase while the threshold voltage shifts from positive to negative. The different dependence of the SCLC mobility and field effect mobility on the annealing temperature suggest the improvement of the film crystallinity after thermal annealing is not the only dominating effect. Our investigation provides the constructive information to tune the thermal and electrical properties of organic semiconductors.

Effects of N2O Anneal on Channel Mobility of 4H-SiC MOSFET and Gate Oxide Reliability

2005 ◽  
Vol 483-485 ◽  
pp. 697-700 ◽  
Author(s):  
Keiko Fujihira ◽  
Yoichiro Tarui ◽  
Kenichi Ohtsuka ◽  
Masayuki Imaizumi ◽  
Tetsuya Takami
Keyword(s):  
Field Effect ◽  
Gate Oxide ◽  
Field Effect Mobility ◽  
Channel Mobility ◽  
Oxide Reliability ◽  
Anneal Temperature

The effect of N2O anneal on channel mobility of inversion-type 4H-SiC n-channel MOSFET has been systematically investigated. It is found that the mobility increases with increasing anneal temperature from 900 to 1150°C. The highest field effect mobility of 30 cm2/Vs is achieved by 1150°C anneal for 3 h, which is about 20 times higher than that for non-annealed MOSFET. In order to investigate the oxide reliability, TDDB measurement has been performed on SiO2 grown on n-type 4H-SiC. The oxide lifetime is found to be drastically improved by N2O anneal.

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