Field Effect Mobility in n-Channel Si Face 4H-SiC MOSFET with Gate Oxide Grown on Aluminium Ion-Implanted Material

We report investigations of Si face 4H-SiC MOSFETs with aluminum ion implanted gate channels. High quality SiO2/SiC interface is obtained both when the gate oxide is grown on p-type epitaxial material and when grown on ion implanted regions. A peak field effect mobility of 170 cm2/Vs is extracted from transistors with epitaxially grown channel region of doping 5x1015 cm-3. Transistors with implanted gate channels with aluminum concentration of 1x1017 cm-3 exhibit peak field effect mobility of 108 cm2/Vs, while the mobility is 62 cm2/Vs for aluminum concentration of 5x1017 cm-3. The mobility reduction with increasing acceptor density follows the same functional relationship as in n-channel Si MOSFETs.

Download Full-text

Process Optimisation for 4H-SiC MOSFET Applications

Materials Science Forum ◽

10.4028/www.scientific.net/msf.527-529.1051 ◽

2006 ◽

Vol 527-529 ◽

pp. 1051-1054 ◽

Cited By ~ 7

Author(s):

Caroline Blanc ◽

Dominique Tournier ◽

Phillippe Godignon ◽

D.J. Brink ◽

Véronique Soulière ◽

...

Keyword(s):

Field Effect ◽

Oxidation Process ◽

Gate Oxide ◽

Process Optimisation ◽

Field Effect Mobility ◽

Oxide Formation ◽

Step Procedure ◽

P Type ◽

Peak Value ◽

Gas Precursor

We report on 4H-SiC MOSFET devices implemented on p-type <11-20>-oriented epitaxial layers, using a two-step procedure for gate oxide formation. First is a thin, dry, thermal SiO2 layer grown at 1050°C for 1 hour. Next, is a thick (50 nm) layer of complementary oxide deposited by PECVD using TEOS as gas precursor. With respect to the standard thermal oxidation process, this results in much improvement of the field effect mobility. For the best samples, we find a peak value in the range of 330 cm2/Vs while, on the full wafer, an average mobility of about 160 cm2/Vs is found. Up to now, this is one of the best results ever reported for 4H-SiC MOSFETs.

Download Full-text

Effects of N2O Anneal on Channel Mobility of 4H-SiC MOSFET and Gate Oxide Reliability

Materials Science Forum ◽

10.4028/www.scientific.net/msf.483-485.697 ◽

2005 ◽

Vol 483-485 ◽

pp. 697-700 ◽

Cited By ~ 3

Author(s):

Keiko Fujihira ◽

Yoichiro Tarui ◽

Kenichi Ohtsuka ◽

Masayuki Imaizumi ◽

Tetsuya Takami

Keyword(s):

Field Effect ◽

Gate Oxide ◽

Field Effect Mobility ◽

Channel Mobility ◽

Oxide Reliability ◽

Anneal Temperature

The effect of N2O anneal on channel mobility of inversion-type 4H-SiC n-channel MOSFET has been systematically investigated. It is found that the mobility increases with increasing anneal temperature from 900 to 1150°C. The highest field effect mobility of 30 cm2/Vs is achieved by 1150°C anneal for 3 h, which is about 20 times higher than that for non-annealed MOSFET. In order to investigate the oxide reliability, TDDB measurement has been performed on SiO2 grown on n-type 4H-SiC. The oxide lifetime is found to be drastically improved by N2O anneal.

Download Full-text

Comparison of 4H-SiC MOSFETs on (0001), (000-1) and (11-20) Oriented Substrates

Materials Science Forum ◽

10.4028/www.scientific.net/msf.615-617.785 ◽

2009 ◽

Vol 615-617 ◽

pp. 785-788 ◽

Cited By ~ 11

Author(s):

Harsh Naik ◽

K. Tang ◽

T. Marron ◽

T. Paul Chow ◽

Jody Fronheiser

Keyword(s):

Low Temperature ◽

Carrier Concentration ◽

Threshold Voltage ◽

Hall Mobility ◽

Field Effect ◽

Gate Oxide ◽

Subthreshold Slope ◽

Field Effect Mobility

The effect of using different orientations of 4H-SiC substrates on the performance of 4H-SiC MOSFETs has been evaluated. Three sets of samples with (0001), (000-1) and (11-20) oriented SiC substrates were used to fabricate the MOSFETs, with a gate oxide process consisting of a low- temperature deposited oxide followed by NO anneal at 1175°C for 2hrs. Various device parameters, particularly threshold voltage, subthreshold slope, field-effect mobility, inversion sheet carrier concentration and Hall mobility have been extracted. Temperature characterization up to 225°C was also performed.

Download Full-text

Effect of Graphite Cap for Implant Activation on Inversion Channel Mobility in 4H-SiC MOSFETs

Materials Science Forum ◽

10.4028/www.scientific.net/msf.615-617.773 ◽

2009 ◽

Vol 615-617 ◽

pp. 773-776 ◽

Cited By ~ 15

Author(s):

Harsh Naik ◽

K. Tang ◽

T. Paul Chow

Keyword(s):

Low Temperature ◽

Carrier Concentration ◽

Threshold Voltage ◽

Hall Mobility ◽

Field Effect ◽

Gate Oxide ◽

Subthreshold Slope ◽

Field Effect Mobility ◽

Channel Mobility ◽

Inversion Channel

The effects of using a graphite capping layer during implant activation anneal on the performance of 4H-SiC MOSFETs has been evaluated. Two sets of samples, one with the graphite cap and another without, with a gate oxide process consisting of a low-temperature deposited oxide followed by NO anneal at 1175°C for 2hrs were used for characterization. Various device parameters, particularly threshold voltage, subthreshold slope, field-effect mobility, inversion sheet carrier concentration and Hall mobility have been extracted for the two processes.

Download Full-text

SiC and GaN MOS Interfaces – Similarities and Differences

Materials Science Forum ◽

10.4028/www.scientific.net/msf.645-648.473 ◽

2010 ◽

Vol 645-648 ◽

pp. 473-478 ◽

Cited By ~ 1

Author(s):

T. Paul Chow

Keyword(s):

Carrier Concentration ◽

Threshold Voltage ◽

Field Effect ◽

Gate Oxide ◽

Electron Trapping ◽

Electrical Characteristics ◽

Subthreshold Slope ◽

Field Effect Mobility ◽

Mos Capacitors ◽

Similarities And Differences

We have comparatively characterized the electrical characteristics of 4H-SiC and 2H-GaN MOS capacitors and FETs. While progressive refinement of gate oxide processes, notably with NO anneal, has resulted in better threshold voltage control, reduced subthreshold slope and higher field-effect mobility for 4H-SiC MOSFETs, we have recently reported more superior MOS parameters for 2H-GaN MOSFETs. In addition, we have performed MOS-gated Hall measurements to extract the intrinsic carrier concentration and MOS mobility, indicating that both less channel electron trapping and scattering take place in 2H-GaN MOSFETs.

Download Full-text

Characterization of Interface State Density from Subthreshold Slope of MOSFETs at Low Temperatures (≥ 10 K)

Materials Science Forum ◽

10.4028/www.scientific.net/msf.821-823.745 ◽

2015 ◽

Vol 821-823 ◽

pp. 745-748

Author(s):

Hironori Yoshioka ◽

Junji Senzaki ◽

Atsushi Shimozato ◽

Yasunori Tanaka ◽

Hajime Okumura

Keyword(s):

Low Temperatures ◽

Field Effect ◽

Gate Oxide ◽

Interface State ◽

State Density ◽

Interface State Density ◽

Subthreshold Slope ◽

Field Effect Mobility ◽

Peak Field

We have evaluated interface state density (DIT) for EC−ET > 0.00 eV from the subthreshold slope deterioration of MOSFETs at low temperatures. We have compared two n-channel MOSFETs on the C- and a-faces with the gate oxide formed by pyrogenic oxidation followed by annealing in H2. The peak field-effect mobility (µFE,peak) for the C-face MOSFET was 57 cm2V-1s-1 at 300 K, which is lower than the half of 135 cm2V-1s-1 for the a-face MOSFET. We have shown that DIT very close to EC can well explain why µFE for C-face MOSFETs is lower than that for a-face MOSFETs. The value of DIT at 0.00 eV corresponding to the subthreshold slope at 11 K was 1.6×1014 cm-2eV-1 for the C-face MOSFET, which is more than the double of 6.4×1013 cm-2eV-1 for the a-face MOSFET.

Download Full-text

High Field Effect Mobility in 6H-SiC MOSFET with Gate Oxides Grown in Alumina Environment

Materials Science Forum ◽

10.4028/www.scientific.net/msf.483-485.837 ◽

2005 ◽

Vol 483-485 ◽

pp. 837-840 ◽

Cited By ~ 2

Author(s):

Fredrik Allerstam ◽

G. Gudjónsson ◽

H.Ö. Ólafsson ◽

Einar Ö. Sveinbjörnsson ◽

T. Rödle ◽

...

Keyword(s):

Field Effect ◽

Field Effect Transistors ◽

Gate Oxide ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Field Effect Mobility ◽

Gate Oxides ◽

Channel Mobility ◽

Inversion Channel ◽

Peak Field

Lateral inversion channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were manufactured on 6H-SiC and two gate oxidation recipes were compared. In one case the gate oxide was grown in N2O using quartz environment. The resulting peak field-effect mobility was µFE=43 cm2/Vs. In the other case the gate oxide was grown in oxygen using alumina environment and the resulting peak field-effect mobility was µFE=130 cm2/Vs. Oxidizing in an environment made from sintered alumina introduces contaminants into the oxide that effect the oxidation in several^ways. The oxidation rate is increased and the resulting SiC/SiO2 interface allows higher inversion channel mobility.

Download Full-text

PERFORMANCE OF MOSFETs ON REACTIVE-ION-ETCHED GaN SURFACES

International Journal of High Speed Electronics and Systems ◽

10.1142/s0129156409006163 ◽

2009 ◽

Vol 19 (01) ◽

pp. 121-127 ◽

Cited By ~ 1

Author(s):

KE TANG ◽

WEIXIAO HUANG ◽

T. PAUL CHOW

Keyword(s):

Field Effect ◽

Annealing Temperature ◽

Gate Oxide ◽

Subthreshold Swing ◽

Field Effect Mobility ◽

Annealing Temperatures ◽

Enhancement Mode ◽

Optimal Annealing Temperature

We have fabricated, characterized and compared the performance of lateral enhancement-mode GaN MOSFETs on as-grown and RIE-etched surfaces with 900 and 1000°C gate oxide annealing temperatures. Both subthreshold swing and field effect mobility show 1000°C is the optimal annealing temperature for the PECVD gate oxide in our MOSFET process.

Download Full-text