Influence of Post-Implantation Annealing Temperature on MOSFET Performance and Oxide Reliability

2013 ◽  
Vol 740-742 ◽  
pp. 703-706
Author(s):  
Michael Grieb ◽  
Stefan Noll ◽  
Dick Scholten ◽  
Martin Rambach

In the present work, we studied the influence of the post-implantation annealing temperature on the performance and oxide reliability of lateral 4H-SiC MOSFETs. The maximum field effect mobility of the MOSFETs at 25°C decreases from 22.4cm2/Vs to 17.2cm2/Vs by increasing annealing temperature from 1600°C to 1800°C. Respectively, the measured meantime to failure is about one order of magnitude higher for the 1700°C annealed sample at an applied field of 8.5MV/cm compared to the 1600°C and 1800°C annealed samples.

MRS Advances ◽  
2016 ◽  
Vol 1 (22) ◽  
pp. 1637-1643 ◽  
Author(s):  
Xinyu Wang ◽  
Boyu Peng ◽  
Paddy Chan

ABSTRACTThe thermal and electrical properties of organic semiconductor are playing critical roles in the device applications especially on the devices with large area. Although the effect may be minor in a single device like field effect transistors, the unwanted waste heat would cause much more severe problems in large-scale devices as the power density will go up significantly. The waste heat would lead to performance degradation or even failure of the devices, and thus a more detailed study on the thermal conductivity and carrier mobility of the organic thin film would be beneficial to predict the limits of the device or design a thermally stable device. Here we explore the thermal annealing effect on the thermal and electrical properties of the small molecule organic semiconductor, dinaphtho[2,3-b:2’,3’-f]thieno[3,2-b]thiophene (DNTT). After the post deposition thermal annealing, the grain size of the film increases and in-plane crystallinity improves while cross-plane crystallinity keeps relatively constant. We demonstrated the cross-plane thermal conductivity is independent of the thermal annealing temperature and high annealing temperature will reduce the space-charge-limited current (SCLC) mobility. When the annealing temperature increase from 24 °C to 140 °C, the field effect mobility shows a gradual increase while the threshold voltage shifts from positive to negative. The different dependence of the SCLC mobility and field effect mobility on the annealing temperature suggest the improvement of the film crystallinity after thermal annealing is not the only dominating effect. Our investigation provides the constructive information to tune the thermal and electrical properties of organic semiconductors.


2005 ◽  
Vol 483-485 ◽  
pp. 697-700 ◽  
Author(s):  
Keiko Fujihira ◽  
Yoichiro Tarui ◽  
Kenichi Ohtsuka ◽  
Masayuki Imaizumi ◽  
Tetsuya Takami

The effect of N2O anneal on channel mobility of inversion-type 4H-SiC n-channel MOSFET has been systematically investigated. It is found that the mobility increases with increasing anneal temperature from 900 to 1150°C. The highest field effect mobility of 30 cm2/Vs is achieved by 1150°C anneal for 3 h, which is about 20 times higher than that for non-annealed MOSFET. In order to investigate the oxide reliability, TDDB measurement has been performed on SiO2 grown on n-type 4H-SiC. The oxide lifetime is found to be drastically improved by N2O anneal.


2021 ◽  
Vol 63 (2) ◽  
pp. 224
Author(s):  
Б.Ф. Габбасов ◽  
А.А. Родионов ◽  
С.И. Никитин ◽  
В.А. Трепаков ◽  
Р.В. Юсупов

The results of the study of the electric field effect in the electron paramagnetic resonance spectra of the Fe3+ and Mn4+ impurity ions in thin oriented strontium titanate single-crystal plates are presented. The crystal structure of plates at T> 105 K turned out to be tetragonal, different from both the cubic and the antiferrodistortive tetragonal, inherent to SrTiO3 at T < 105 K. It is shown that for the studied centers, the electric field effect is quadratic in the applied electric field and has the same sign and order of magnitude, indicating the nonpolar origin of the observed high temperature tetragonal state. Analysis of the dependences of the axiality value on the applied field indicates that the electric field effect does not originate from the electrostriction and is due to the modification the wavefunction of the ground state of the impurity centers.


2017 ◽  
Vol 30 (3) ◽  
pp. 46-50
Author(s):  
Cesar Adrian Pons Flores ◽  
Israel Mejía ◽  
Manuel Quevedo-Lopez ◽  
Clemente Alvarado Beltran ◽  
Luis Martín Reséndiz

We analyze the influence of three combined effects on the contact resistance in organic- based thin film transistors: a) the active layer thickness, b) device architecture and c) semiconductor degradation. Transfer characteristics and parasitic series resistance were analyzed in devices with three different active layer thicknesses (50, 100 and 150 nm) using top contact (TC) and bottom contact (BC) thin film transistor (TFT) configurations. In both configurations, the lowest contact resistance (2.49 × 106 ?) and the highest field-effect mobility (4.8 × 10-2 cm2/V·s) was presented in devices with the thicker pentacene film. Top contact thin film transistors presented field-effect mobility values one order of magnitude higher (4.8 × 10-2 cm2/V·s) than bottom contact ones (1 × 10-3 cm2/V·s). Threshold voltage for top-contact thin film transistors was -3.1 V. After 2 months, performance in the devices degraded and presented an increase of one order of magnitude   (105 - 106 ?) for BC-TFTs and two orders of magnitude (106 - 108 ?) for TC-TFTs in contact resistance.


2014 ◽  
Vol 778-780 ◽  
pp. 927-930
Author(s):  
Cheng Tyng Yen ◽  
Mietek Bakowski ◽  
Chien Chung Hung ◽  
Sergey A. Reshanov ◽  
Adolf Schöner ◽  
...  

SiC lateral MOSFETs with multi-layers epi-channels were studied in this work. The epi-channel with a high concentration n-type epilayer sandwiched by two lightly doped p-type layers showed a maximum field effect mobility of 17 cm2/V.s, improved from 1.53 cm2/V.s of devices without epi-channels. These devices are normally-off with an average threshold voltage of 1.34V.


2016 ◽  
Vol 858 ◽  
pp. 651-654 ◽  
Author(s):  
Aleksey I. Mikhaylov ◽  
S.A. Reshanov ◽  
Adolf Schöner ◽  
Alexey V. Afanasyev ◽  
Victor V. Luchinin ◽  
...  

High channel mobility 4H-SiC MOSFETs have been demonstrated by phosphorus and arsenic implantation prior to thermal oxidation in N2O. The maximum field-effect mobility of 81 and 114 cm2/Vs were achieved, respectively. The MOSFET fabrication was done on lightly aluminium doped p-type epitaxial layers and on heavily aluminium implanted p-well.


1996 ◽  
Vol 448 ◽  
Author(s):  
Tae-Kyung Kim ◽  
Byung-Il Lee ◽  
Tae-Hyung Ihn ◽  
Seung-Ki Joo

AbstractPoly-Si TFT’s were fabricated on the glass substrate by the Metal Induced Lateral Crystallization(MILC). Before deposition of the active a-Si thin films(1000 Å), the glass substrate was pretreated in three different ways such as oxidation of a-Si(100 Å), oxide buffer layer deposition(1000 Å), and ion mass doping of the glass substrates. The leakage current at reverse bias could be reduced by one order of magnitude by the substrate pretreatment. Field effect mobility of n-channel TFT’s was 108cm2/Vsec, subthreshold slope and on/off current ratio were 0.7 V/dec. and about 106, respectively.


Coatings ◽  
2020 ◽  
Vol 10 (12) ◽  
pp. 1261
Author(s):  
Wei-De Chen ◽  
Sheng-Po Chang ◽  
Wei-Lun Huang

In this work, an MgIn2O4 (MIO) thin film transistor (TFT) with a bottom gate structure was fabricated. The MIO channel layer was deposited by RF sputtering using a single MgIn2O4 target. The performance of MIO TFT was highly related to oxygen vacancies. As-deposited MIO TFT showed a low field-effect mobility due to doping of Mg. An MgO buffer layer was introduced to enhance the mobility of MIO TFT due to improvement of the interface with the channel layer. In addition, oxygen vacancies in the MIO channel were suppressed because of oxygen diffusion from the buffer layer. MIO TFT with a 5 nm MgO buffer layer showed an on/off current ratio of 9.68 × 103, a field-effect mobility of 4.81 cm2/V∙s, which was increased more than an order of magnitude compared with the device without a buffer layer, a threshold voltage of 2.01 V, and a subthreshold swing of 0.76 V/decade, which was improved more than 20% compared with the as-deposited one.


2009 ◽  
Vol 19 (01) ◽  
pp. 121-127 ◽  
Author(s):  
KE TANG ◽  
WEIXIAO HUANG ◽  
T. PAUL CHOW

We have fabricated, characterized and compared the performance of lateral enhancement-mode GaN MOSFETs on as-grown and RIE-etched surfaces with 900 and 1000°C gate oxide annealing temperatures. Both subthreshold swing and field effect mobility show 1000°C is the optimal annealing temperature for the PECVD gate oxide in our MOSFET process.


Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 200
Author(s):  
Do Won Kim ◽  
Hyeon Joong Kim ◽  
Changmin Lee ◽  
Kyoungdu Kim ◽  
Jin-Hyuk Bae ◽  
...  

Sol-gel processed SnO2 thin-film transistors (TFTs) were fabricated on SiO2/p+ Si substrates. The SnO2 active channel layer was deposited by the sol-gel spin coating method. Precursor concentration influenced the film thickness and surface roughness. As the concentration of the precursor was increased, the deposited films were thicker and smoother. The device performance was influenced by the thickness and roughness of the SnO2 active channel layer. Decreased precursor concentration resulted in a fabricated device with lower field-effect mobility, larger subthreshold swing (SS), and increased threshold voltage (Vth), originating from the lower free carrier concentration and increase in trap sites. The fabricated SnO2 TFTs, with an optimized 0.030 M precursor, had a field-effect mobility of 9.38 cm2/Vs, an SS of 1.99, an Ion/Ioff value of ~4.0 × 107, and showed enhancement mode operation and positive Vth, equal to 9.83 V.


Sign in / Sign up

Export Citation Format

Share Document