Residue Checker with Signed-Digit Arithmetic for Error Detection of Arithmetic Circuits

2003 ◽  
Vol 12 (01) ◽  
pp. 41-53 ◽  
Author(s):  
Shugang Wei ◽  
Kensuke Shimizu
Keyword(s):  
Real Time ◽  
Error Detection ◽  
Binary Tree ◽  
Word Length ◽  
Arithmetic Circuits ◽  
Binary Number ◽  
Residue Number ◽  
Residue Arithmetic ◽  
Large Product ◽  
Binary Tree Structure

This paper presents a fast residue checker for the error detection of arithmetic circuits. The residue checker consists of a number of residue arithmetic circuits such as adders, multipliers and binary-to-residue converters based on radix-two signed-digit (SD) number arithmetic. The proposed modulo m (m = 2p ± 1) adder is designed with a p-digit SD adder, so that the modulo m addition time is independent of the word length of operands. The modulo m multiplier and binary-to-residue number converter are constructed with a binary tree structure of the modulo m SD adders. Thus, the modulo m multiplication is performed in a time proportional to log 2 p and an n-bit binary number is converted into a p-digit SD residue number, n ≫ p, in a time proportional to log 2(n/p). By using the presented residue arithmetic circuits, the error detection can be performed in real-time for a large product-sum circuit.

Real-time error detection techniques based on FPGA

2013 ◽  
Vol 33 (5) ◽  
pp. 1459-1462
Author(s):  
Xiaoming JU ◽  
Jiehao ZHANG ◽  
Yizhong ZHANG
Keyword(s):  
Real Time ◽  
Error Detection ◽  
Time Error ◽  
Detection Techniques

On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits

2020 ◽  
Vol 36 (1) ◽  
pp. 33-46
Author(s):  
B. Deveautour ◽  
A. Virazel ◽  
P. Girard ◽  
V. Gherman
Keyword(s):  
Error Detection ◽  
Arithmetic Circuits ◽  
Approximate Computing ◽  
Detection Scheme

Unmanned aerial vehicle reconnaissance image recognition based on convolutional neural network

2021 ◽  
pp. 1-10
Author(s):  
Lipeng Si ◽  
Baolong Liu ◽  
Yanfang Fu
Keyword(s):  
Neural Network ◽  
Real Time ◽  
Image Recognition ◽  
Error Detection ◽  
Convolution Neural Network ◽  
Data Sets ◽  
Small Target ◽  
Network Algorithm ◽  
Neural Network Algorithm ◽  
Real Time Tracking

The important strategic position of military UAVs and the wide application of civil UAVs in many fields, they all mark the arrival of the era of unmanned aerial vehicles. At present, in the field of image research, recognition and real-time tracking of specific objects in images has been a technology that many scholars continue to study in depth and need to be further tackled. Image recognition and real-time tracking technology has been widely used in UAV aerial photography. Through the analysis of convolution neural network algorithm and the comparison of image recognition technology, the convolution neural network algorithm is improved to improve the image recognition effect. In this paper, a target detection technique based on improved Faster R-CNN is proposed. The algorithm model is implemented and the classification accuracy is improved through Faster R-CNN network optimization. Aiming at the problem of small target error detection and scale difference in aerial data sets, this paper designs the network structure of RPN and the optimization scheme of related algorithms. The structure of Faster R-CNN is adjusted by improving the embedding of CNN and OHEM algorithm, the accuracy of small target and multitarget detection is improved as a whole. The experimental results show that: compared with LENET-5, the recognition accuracy of the proposed algorithm is significantly improved. And with the increase of the number of samples, the accuracy of this algorithm is 98.9%.

scholarly journals Efficient Searchable Symmetric Encryption Supporting Dynamic Multikeyword Ranked Search

2020 ◽  
Vol 2020 ◽  
pp. 1-16
Author(s):  
Yu Zhang ◽  
Yin Li ◽  
Yifan Wang
Keyword(s):  
Binary Tree ◽  
Search Time ◽  
Symmetric Encryption ◽  
Time Cost ◽  
Computational Costs ◽  
Related Space ◽  
Insertion And Deletion ◽  
Searchable Symmetric Encryption ◽  
Ranked Search ◽  
Binary Tree Structure

Searchable symmetric encryption that supports dynamic multikeyword ranked search (SSE-DMKRS) has been intensively studied during recent years. Such a scheme allows data users to dynamically update documents and retrieve the most wanted documents efficiently. Previous schemes suffer from high computational costs since the time and space complexities of these schemes are linear with the size of the dictionary generated from the dataset. In this paper, by utilizing a shallow neural network model called “Word2vec” together with a balanced binary tree structure, we propose a highly efficient SSE-DMKRS scheme. The “Word2vec” tool can effectively convert the documents and queries into a group of vectors whose dimensions are much smaller than the size of the dictionary. As a result, we can significantly reduce the related space and time cost. Moreover, with the use of the tree-based index, our scheme can achieve a sublinear search time and support dynamic operations like insertion and deletion. Both theoretical and experimental analyses demonstrate that the efficiency of our scheme surpasses any other schemes of the same kind, so that it has a wide application prospect in the real world.

Parametric Design of Parts in an Integrated Simulation System Based on Asynchronous Mode of Pro/TOOLKIT

2012 ◽  
Vol 479-481 ◽  
pp. 1403-1408
Author(s):  
Gang Lian Zhao ◽  
Yi Jiang ◽  
Yu Jun Chen ◽  
Yan Li Ma
Keyword(s):  
Binary Tree ◽  
Parametric Design ◽  
Design Procedure ◽  
Simulation System ◽  
Tree Structure ◽  
Asynchronous Mode ◽  
Engineering Drawing ◽  
Integrated Simulation ◽  
Binary Tree Structure ◽  
Different Parts

Based on software Pro/ENGINEER and Visual C++ 2005，sub-module of parametric design of assembly with wide universality was done by using Pro/TOOLKIT, and the design procedure was introduced in details. Assembly relation of sub-components is transformed into binary tree structure to store and search parts, and the assembly relation is displayed by CTreeCtrl control. The corresponding parts can be quickly found in the binary tree. Engineering drawing was automatically generated and displayed by ProductView after loading a part, and in this way dimensions of different parts can be modified according to engineering drawing in asynchronous mode. The sub-module can meet the needs of parametric design of parts in the integrated simulation system.

scholarly journals Constant-coefficient FIR filters based on residue number system arithmetic

2012 ◽  
Vol 9 (3) ◽  
pp. 325-342 ◽  
Author(s):  
Negovan Stamenkovic ◽  
Vladica Stojanovic
Keyword(s):  
Power Dissipation ◽  
High Speed ◽  
Finite Impulse Response ◽  
Number System ◽  
Residue Number System ◽  
Fir Filter ◽  
Fir Filters ◽  
Residue Number ◽  
Low Power Dissipation ◽  
Residue Arithmetic

In this paper, the design of a Finite Impulse Response (FIR) filter based on the residue number system (RNS) is presented. We chose to implement it in the (RNS), because the RNS offers high speed and low power dissipation. This architecture is based on the single RNS multiplier-accumulator (MAC) unit. The three moduli set {2n+1,2n,2n-1}, which avoids 2n+1 modulus, is used to design FIR filter. A numerical example illustrates the principles of residue encoding, residue arithmetic, and residue decoding for FIR filters.

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