Memristor Emulator Circuit Using Multiple-Output OTA and Its Experimental Results

2019 ◽  
Vol 28 (10) ◽  
pp. 1950166 ◽  
Author(s):  
Rajeev Kumar Ranjan ◽  
Pankaj Kumar Sharma ◽  
Sagar ◽  
Niranjan Raj ◽  
Bharti Kumari ◽  
...  

A charge-controlled memristor emulator circuit based on one kind of active device [operational transconductance amplifier (OTA)] using CMOS technology is introduced in this paper. The proposed circuit can be configured in both incremental and decremental types by using a simple switch. The memristor behavior can be electronically tuned by adjusting the transconductance of the OTAs. By changing the value of the capacitor, the pinched hysteresis loop observed in the current versus voltage plane can be held at higher frequencies. The proposed emulator circuit functions well up to 500 kHz. The experiment has been performed using commercially available OTA ICs (CA3080). The experimental demonstration has been carried out for 10, 20 and 120[Formula: see text]kHz. A simple high-pass filter is explained in both configurations to demonstrate the functionality of the proposed memristor emulator. The proposed circuit has been simulated in PSPICE using 0.5-[Formula: see text]m CMOS parameter. The simulated and experimental results validate the theoretical proposition.

Complexity ◽  
2017 ◽  
Vol 2017 ◽  
pp. 1-15 ◽  
Author(s):  
B. J. Maundy ◽  
A. S. Elwakil ◽  
C. Psychalinos

Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. We show the equivalency to a charge-controlled resistance (memristance) in a decremental state via detailed analysis. Simulation and experimental results verify the proposed theory.


This paper presents a voltage-mode(VM) tunable multifunction inverse filter configuration employing current differencing buffered amplifiers (CDBA). The presented structure utilizes two CDBAs, two/three capacitors and four/five resistors to realize inverse low pass filter (ILPF), inverse high pass filter (IHPF), inverse band pass filter (IBPF), and inverse band reject filter(IBRF) from the same circuit topology by suitable selection(s) of the branch admittances(s). PSPICE simulations have been performed with 0.18µm TSMC CMOS technology to validate the theory. Some sample experimental results have also been provided using off-the-shelf IC AD844 based CDBA.


2019 ◽  
Vol 29 (05) ◽  
pp. 2050078 ◽  
Author(s):  
Mohammad Faseehuddin ◽  
Jahariah Sampe ◽  
Sadia Shireen ◽  
Sawal Hamid Md Ali

In this paper, a new active element namely Dual-X current conveyor differential input transconductance amplifier (DXCCDITA) is proposed. The DXCCDITA is utilized in designing four minimum component fully cascadable all pass filter (APF) structures. The designed all pass filters require only single active element and one/two passive elements for realization thus making them a minimum component implementation. Two among the four presented all pass structures require only a single capacitor for implementation. A scheme for realizing nth order all pass filter is also suggested and a fourth order voltage mode (VM) filter is developed from the proposed scheme. The effect of non-idealities on the proposed all pass filters is also studied. A simple oscillator is also developed using one of the all pass filter structure. The oscillator required only one DXCCDITA, two capacitors and one resistor for implementation. The DXCCDITA is implemented in 0.35[Formula: see text][Formula: see text]m TSMC CMOS technology parameters and tested in Tanner EDA. Sufficient numbers of simulations are provided to establish the functionality of all pass structures. The experimental results using commercially available integrated circuits (ICs) are also provided.


Author(s):  
Nisha Yadav ◽  
Shireesh Kumar Rai ◽  
Rishikesh Pandey

In this paper, new memristor-less meminductor emulators have been proposed using voltage differencing transconductance amplifier (VDTA), current differencing buffered amplifier (CDBA) and a grounded capacitor. The proposed decremental/incremental meminductor emulators have been realized in both grounded and floating types of configurations. In the proposed meminductor emulators, analog multiplier, memristor and passive resistors are not used which result in simpler configurations. The pinched hysteresis loops are maintained up to 2[Formula: see text]MHz for both decremental and incremental configurations of meminductor emulators. The behaviors of decremental and incremental meminductor emulators have been analyzed after applying input pulses. The obtained results verify the performances as decremental and incremental meminductor emulators. The simulation results have been obtained using Mentor Graphics Eldo simulation tool with 180[Formula: see text]nm CMOS technology parameters. To verify the performances of the proposed meminductor emulators, adaptive learning circuit and chaotic oscillator have been designed. The performances of the proposed meminductor emulators are compared with other meminductor emulators reported in the literature.


2020 ◽  
Vol 29 (15) ◽  
pp. 2050247 ◽  
Author(s):  
Hasan Sozen ◽  
Ugur Cam

Meminductor is a nonlinear two-terminal element with storage energy and memory ability. To date, meminductor element is not available commercially as memristor and memcapacitor are. Therefore, it is of great significance to implement a meminductor emulator for breadboard experiment. In this paper, a flux-controlled floating/grounded meminductor emulator without a memristor is presented. It is built with commercially available off-the-shelf electronic devices. It consists of single operational transconductance amplifier (OTA), single multiplier, two second-generation current conveyors (CCIIs), single current-feedback operational amplifier (CFOA) and single operational amplifier. Using OTA device introduces an additional control parameter besides frequency and amplitude values of applied voltage to control the area of pinched hysteresis loop of meminductor. Mathematical model of proposed emulator circuit is given to describe the behavior of meminductor circuit. The breadboard experiment is performed using CA3080, AD844, AD633J and LM741 for OTA, CCII–CFOA, multiplier and operational amplifier, respectively. Simulation and experimental test results are given to verify the theoretical analyses. Frequency-dependent pinched hysteresis loop is maintained up to 5 kHz. The presented meminductor emulator tends to work as ordinary inductor for higher frequencies.


2015 ◽  
Vol 731 ◽  
pp. 57-61
Author(s):  
Ju Hua Liu ◽  
Yao Hua Yi ◽  
Yuan Yuan ◽  
Hai Su ◽  
Min Jing Miao

Since the traditional gamut compression algorithms will fail to consider the image spatial characteristics, a novel gamut compression method based on the image spatial characteristics is proposed in this paper. At first, the image is compressed by traditional compression algorithm, then the compensation values of lightness and chroma obtained by a high-pass filter are added to the compressed image. Finally, a gamut clipping processing is carried out. Experimental results indicate that the proposed method can not only guarantee the color features, but also preserve the image spatial characteristics quite well.


2011 ◽  
Vol 2011 ◽  
pp. 1-5 ◽  
Author(s):  
Neeta Pandey ◽  
Sajal K. Paul

This paper presents a single current difference transconductance amplifier (CDTA) based all-pass current mode filter. The proposed configuration makes use of a grounded capacitor which makes it suitable for IC implementation. Its input impedance is low and output impedance is high, hence suitable for cascading. The circuit does not use any matching constraint. The nonideality analysis of the circuit is also given. Two applications, namely, a quadrature oscillator and a highQband pass filter are developed with the proposed circuit. The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.


2016 ◽  
Vol 26 (02) ◽  
pp. 1750029 ◽  
Author(s):  
Zehra Gulru Cam ◽  
Herman Sedef

In this paper, a new floating analog memristance simulator circuit based on second generation current conveyors and passive elements is proposed. Theoretical derivations are presented which decribe the circuit characteristics. The hardware of proposed simulator circuit is built using commercially available components. Theoretical derivations are validated with PSPICE simulation and experimental results. Performance of circuit was tested with simple example circuits. All results show that proposed simulator circuit provides frequency dependent pinched hysteresis loop and nonvolatility features. Exciting frequency, minimum and maximum memristance values and memristance range can be adjustable with simple passive element values. Simulator circuit has a frequency range of 1[Formula: see text]Hz to 40[Formula: see text]kHz.


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