Confidence-Based Reliability Evaluation of Multistate Production Network with Process Improvement

2015 ◽  
Vol 22 (06) ◽  
pp. 1550028 ◽  
Author(s):  
Shih-Wan Sun ◽  
Ping-Chen Chang ◽  
Yi-Kuei Lin
Keyword(s):  
Process Improvement ◽  
System Reliability ◽  
Production System ◽  
Printed Circuit Board ◽  
Production Systems ◽  
Reliability Evaluation ◽  
Circuit Board ◽  
Production Network ◽  
Evaluation Approach ◽  
The Individual

Effectively assessing and improving production systems in different scenarios are critical for the management of production processes. This paper proposes a new approach that takes process improvement into consideration to evaluate system reliability. The system reliability is defined as the probability that the volume of input processed successfully through the individual workstations within a production system. This system reliability evaluation approach models the production system as a confidence-based multistate production network (CP-MPN). The discrete-time Markov chain is adopted to feature the CP-MPN, and the target success rate (TSR) is set as a reference to achieve the purpose of process improvement of each workstation. Our results indicate that, when the TSR is improved, the CP-MPN can meet both the given demand and confidence level with less input. This curtailed input volume diminishes the loadings of workstations so that the system reliability of the CP-MPN can be enhanced. Two examples (a tile production system and a printed circuit board (PCB) production system) are presented to demonstrate the confidence-based reliability evaluation approach and prove our results. This paper provides not only a practicable method to evaluate system reliability that includes the process improvement perspective but also a workable indicator to guide production managers to improve the quality of workstations.

scholarly journals A compact low-noise frontend for interleaved Rx/Tx arrays at K-/Ka-Band

2021 ◽  
pp. 1-7
Author(s):  
Anton Sieganschin ◽  
Thomas Jaschke ◽  
Arne F. Jacob
Keyword(s):  
Insertion Loss ◽  
Printed Circuit Board ◽  
Noise Figure ◽  
Low Noise ◽  
Single Band ◽  
Circuit Board ◽  
Dual Band ◽  
Ka Band ◽  
Compression Properties ◽  
The Individual

Abstract This contribution deals with a frontend for interleaved receive (Rx)-/transmit (Tx)-integrated phased arrays at K-/Ka-band. The circuit is realized in printed circuit board technology and feeds dual-band Rx/Tx- and single-band Tx-antenna elements. The dual-band element feed is composed of a substrate-integrated waveguide (SIW) diplexer with low insertion loss, a low-noise amplifier (LNA), a bandpass filter, and several passive transitions. The compression properties of the LNA are identified through two-tone measurements. The results dictate the maximum allowable output power of the power amplifier. The single band feed consists of a SIW with several transitions. Simulation and measurement results of the individual components are presented. The frontend is assembled and measured. It exhibits an Rx noise figure of 2 dB, a Tx insertion loss of ~ 2.9 dB, and an Rx/Tx-isolation of 70 dB. The setup represents the unit cell of a full array and thus complies with the required half-wave spacing at both Rx and Tx.

Site Redressing Techniques and Rework of Lead-Free Chip Scale Packages

2003 ◽  
Author(s):  
Arun Gowda ◽  
Anthony Primavera ◽  
K. Srihari
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Printed Circuit ◽  
Free Solder ◽  
The Individual ◽  
Component Assembly ◽  
Free Area

The implementation of lead-free solder into an electronics assembly process necessitates the reassessment of the individual factors involved in component attachment and rework. A component assembly undergoes multiple thermal cycles during rework. With the use of lead-free solder, the assemblies are subjected to higher assembly and rework temperatures than those required for eutectic tin-lead assemblies. The rework of lead-free area array components involves the removal of defective component, preparation of the printed circuit board attachment pad (site redressing), solder paste replenishment or flux deposition, and component placement and reflow. This paper primarily focuses on the site redressing aspect of lead-free rework, followed by the development of rework processes for lead-free chip scale packages utilizing the knowledge gained in the site redressing studies.

FTIR analysis of printed-circuit board residue

1996 ◽  
Vol 54 ◽  
pp. 264-265
Author(s):  
Sharon A. Myers ◽  
Troy D. Cognata ◽  
Hugh Gotts
Keyword(s):  
Integrated Circuit ◽  
Isopropyl Alcohol ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Ftir Analysis ◽  
Cotton Swab ◽  
Electrically Conductive ◽  
Printed Circuit ◽  
The Times ◽  
The Individual

Logic boards were failing at Enhanced Mac Minus One (EMMO) test or Integrated Circuit Test (ICT) after printed circuit board (PCB) rework. The failure to boot was originally traced to a suspected bad microcontroller chip. Replacing this chip, or an oscillator tied to the microcontroller circuit, did not consistently solve the boot problem. With further testing, it was found the microcontroller circuit was very sensitive to resistance and was essentially shorted.A resistor in the microcontroller circuit was identified on the flip side of the PCB. Several areas on the board, including the resistor R161, were seen to have a slight white haze/ low gloss appearance on the surface of the PCB. To test if the residue was electrically conductive, five boards were selected whose sole failure was R161. The resistance of the individual resistors was measured with a digital multimeter (DMM). The resistor was then cleaned with isopropyl alcohol and a cotton swab. Each board was retested at ICT and the individual resistors measured again with a DMM. Cleaning the area surrounding the resistor with isopropyl alcohol, corrected the failure four of the times.

Innovative Panel Plating for Heterogeneous Integration

2019 ◽  
Vol 2019 (1) ◽  
pp. 000211-000215
Author(s):  
Richard Boulanger ◽  
Jon Hander ◽  
Robert Moon
Keyword(s):  
Printed Circuit Board ◽  
Metal Layer ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Thickness Uniformity ◽  
Acid Bath ◽  
The Individual ◽  
Electroplating Process ◽  
Bulk Processing ◽  
Better Than

Abstract Panel plating requirements are much more demanding as more applications migrate from silicon to panel assembly such as Panel Level Fan Out (PLFO) to leverage the large sizes of the panels. More recently, Heterogeneous Integration (HI) like Intel's Embedded Bridge (EMIB) or various other embedded die concepts are also pushing the boundary for typical panel structures. Line widths and spaces less than 10 Microns, thickness uniformity better than 10%, via topology free of voids and the same height as the redistribution lines are critical. Traditional Panel plating tools are mostly for bulk processing and are not designed to handle these additional requirements. A new tool was required to overcome these challenges. An electroplating process with a single panel per reservoir approach is used. An overhead transporter brings the individual panels that have been pre-loaded in a rigid panel holder designed to handle large currents as well as reduce the warpage to a series of plating reservoirs as well as pre and post processing steps with the tool. The first process is to reduce voiding by removing all air in a vacuum chamber and then inserting degassed water in the same chamber to “prewet” the panel. Panels are then typically immersed in an acid bath known as an activation step before processing in the plating cells. The plating cells are customized for each metal layer but often include a fine alignment feature, a current uniformity optimizing shield, multiple anode channels for dynamic uniformity along with an agitation mechanism to produce a uniform thin boundary layer at the panel surface. This whole mechanism needs to be very close to the panel, yet still allow some warpage typically associated with panel manufacturing. This paper will demonstrate that it is possible to achieve better line density, bump thickness uniformity and void free vias to allow semiconductor like assembly for Heterogeneous Integration on a standard Printed Circuit Board (PCB) instead of more expensive semi additive processes or silicon interposers

Process Improvement Using Design by Experiments

1994 ◽  
Author(s):  
Hsien-chen Li ◽  
Fuyau Lin
Keyword(s):  
Process Improvement ◽  
Manufacturing Process ◽  
Printed Circuit Board ◽  
Fractional Factorial Design ◽  
Time Budget ◽  
Fractional Factorial ◽  
Circuit Board ◽  
Printed Circuit ◽  
Printed Circuit Board Manufacturing

Abstract This paper present an approach to apply Design by Experiments for process improvement with the objectives to minimize cost and shorten investigation time. A case study of PCB (Printed Circuit Board) manufacturing process is chosen to illustrate this approach. A Fractional Factorial Design by Experiment was performed due to the constraints of the time, budget, and resources.

A Multi-Agent System for Production Networks Simulation

2012 ◽  
pp. 1666-1682
Author(s):  
Samir Hamichi ◽  
Diana Mangalagiu ◽  
Zahia Guessoum
Keyword(s):  
Production Systems ◽  
Organizational Structures ◽  
Production Network ◽  
Production Networks ◽  
Adaptive Agents ◽  
Market Growth ◽  
Business Efficiency ◽  
Multi Agent ◽  
The Individual ◽  
Business Relations

In this chapter, the authors present a multi-agent model aimed to investigate emergent organizational structures in production networks and their reification by means of pheromone-based algorithms. The model considers agents (firms) embedded in a production network, interacting among them through business-to-business relations. The evolution of the network structure is endogenous, as it takes into account the individual behavior of the firms and their interactions. The firms are adaptive agents taking investment decisions according to their business efficiency. They adapt their prices to be competitive and get a larger share of the market. Also, they adapt their business relations with their suppliers in order to reduce costs of inputs and get orders satisfied. The agent’s proactivity, with very simple decision mechanisms at the micro level, leads to the emergence of meta-stable business clusters and supply chains at the macro level. Pheromone-based algorithms reify dynamically these clusters as explicit graphs. The results of the authors’ simulations show the impact of the transportation cost and the geographical reach on the regionalization of production and on wealth patterns. Individual firms, with local B2B interactions and decisions, form stable production systems based on the supply/demand and market growth mechanisms leading to the maturation of the market.

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