LOCAL DOPING AND OPTIMAL ANNEALING OF A MESH MULTILAYER STRUCTURE TO DECREASE THE SPATIAL DIMENSIONS OF INTEGRATED p–n-JUNCTIONS

NANO ◽  
2009 ◽  
Vol 04 (05) ◽  
pp. 303-323 ◽  
Author(s):  
E. L. PANKRATOV

It has been recently shown that inhomogeneity of a multilayer structure and optimization of annealing time give us the possibility to decrease the depth of p–n-junctions, which were produced in the structures. The additional to the considered effect is increasing of homogeneity of dopant distribution in enriched by the dopant area of p–n-junction. In the present paper analysis of dopant redistribution in a multilayer structures during production a series of p–n-junctions, which was produced in the multilayer structures, has been done. We consider an approach to increase the sharpness of both diffused-junction and implanted-junction rectifiers, which comprise in a bipolar transistor or thyristor, and increasing of homogeneity of dopants distributions in enriched by the dopants areas of p–n-junctions. The approach gives us possibility to increase the degree of integration of p–n-junctions, which was produced as elements of integrated circuits. Optimization of annealing time for simultaneously increasing of the sharpness and homogeneity has been done.

NANO ◽  
2011 ◽  
Vol 06 (01) ◽  
pp. 31-40 ◽  
Author(s):  
E. L. PANKRATOV

Dopant redistribution in a multilayer structure during annealing by laser pulses for production of implanted-junction rectifiers has been analyzed. The analysis shows that heating the surface region of the multilayer structure leads to increasing of previously described effect of simultaneously increasing of sharpness of implanted-junction rectifier and homogeneity of dopant distribution in doped area. It was found that the theoretical spatial distribution of dopant agrees with the experimental one. Annealing time has been optimized for laser pulse annealing.


2010 ◽  
Vol 24 (09) ◽  
pp. 867-895 ◽  
Author(s):  
E. L. PANKRATOV

The influence of mechanical stress in a multilayer structure on spatial distribution of dopants in implanted-junction and diffusion-junction rectifiers, which was produced in the structure has been analyzed. It is shown that the stress leads to additional reduction of spatial dimensions of the p–n junction in comparison with the reduction — a result of inhomogeneity — of the diffusion coefficient of dopant and other parameters of dopant redistribution (see, for example, Refs. 1–3).


2010 ◽  
Vol 24 (29) ◽  
pp. 5793-5806
Author(s):  
E. L. PANKRATOV

It has been recently shown that difference between diffusion coefficients of dopant in layers of a multilayer structure leads to increasing of sharpness of diffusion-junction rectifier (see, for example, E. L. Pankratov, Phys. Rev. B72(7), 075201 (2005); E. L. Pankratov and B. Spagnolo, Eur. Phys. J. B 46(1), 15 (2005).), which was formed in the multilayer structure after appropriate choosing of materials of layers. It has been also shown that the difference between the diffusion coefficients also leads to increasing of homogeneity of dopant distribution in doped area. In this paper, both the effects (together increasing of sharpness of p–n-junction and increasing of homogeneity of dopant distribution) have been used to produce a system of p–n-junctions (such as bipolar transistors). Annealing time has been optimized to increase simultaneously the sharpness and the homogeneity.


NANO ◽  
2009 ◽  
Vol 04 (03) ◽  
pp. 177-188
Author(s):  
E. L. PANKRATOV

An approach to increase both the sharpness of a series of diffused-junction rectifiers and to increase the homogeneity of dopant distribution in dopant-enriched areas has been considered. The conditions to obtain both the effects are determined. Annealing time has been optimized for increasing simultaneously the sharpness and the homogeneity. The dependence of the optimal annealing time on several parameters of the model have been analyzed.


2009 ◽  
Vol 23 (22) ◽  
pp. 4637-4653
Author(s):  
E. L. PANKRATOV

It has been recently shown, that inhomogeneity of a multilayer structure (MS) leads to increase in sharpness of diffused-junction rectifier (see, for example, Refs. 1 and 2), which were formed in the MS. It has been also shown, that together with increasing of the sharpness homogeneity of impurity distribution in doped area increases. In this paper, both the effects (together increasing of sharpness of p–n-junction and increasing of homogeneity of impurity distribution) have been used for production of a system of a serial p–n-junctions (such as bipolar transistors). Annealing time has been optimized for increasing simultaneously the sharpness and the homogeneity.


2008 ◽  
Vol 07 (04n05) ◽  
pp. 187-197 ◽  
Author(s):  
E. L. PANKRATOV

In this paper, we analyze dopant redistribution in a multilayer structure during laser scan annealing of radiation defects for the production of an implanted-junction rectifier, taking account of the temperature dependence of the diffusion coefficient. It is shown that inhomogeneity of the structure leads to increase in the sharpness of the implanted-junction rectifier and the homogeneity of the dopant distribution in the doped area. Some conditions on properties of the considered multilayer structure, which correspond to increase in the sharpness and the homogeneity, are determined.


2010 ◽  
Vol 09 (03) ◽  
pp. 159-168
Author(s):  
E. L. PANKRATOV

It has been recently shown, that inhomogeneity of a multilayer structure leads to increasing of sharpness of diffusion-junction rectifier (see, for example, Refs. 1–3), which was formed in the multilayer structure. It has also been shown, that together with increasing sharpness the homogeneity of impurity distribution in doped area increases. In this paper both the effects (increasing of the sharpness of diffusion-junction rectifier and increasing the homogeneity of impurity distribution) have been used for production of a system of p-n-junctions (a bipolar transistors). Annealing time has been optimized for simultaneously increasing the sharpness and the homogeneity.


2002 ◽  
Vol 719 ◽  
Author(s):  
Ian D. Sharp ◽  
Hartmut A. Bracht ◽  
Hughes H. Silvestri ◽  
Samuel P. Nicols ◽  
Jeffrey W. Beeman ◽  
...  

AbstractIsotopically controlled silicon multilayer structures were used to measure the enhancement of self- and dopant diffusion in extrinsic boron doped silicon. 30Si was used as a tracer through a multilayer structure of alternating natural Si and enriched 28Si layers. Low energy, high resolution secondary ion mass spectrometry (SIMS) allowed for simultaneous measurement of self- and dopant diffusion profiles of samples annealed at temperatures between 850°C and 1100°C. A specially designed ion-implanted amorphous Si surface layer was used as a dopant source to suppress excess defects in the multilayer structure, thereby eliminating transient enhanced diffusion (TED) behavior. Self- and dopant diffusion coefficients, diffusion mechanisms, and native defect charge states were determined from computer-aided modeling, based on differential equations describing the diffusion processes. We present a quantitative description of B diffusion enhanced self-diffusion in silicon and conclude that the diffusion of both B and Si is mainly mediated by neutral and singly positively charged self-interstitials under p-type doping. No significant contribution of vacancies to either B or Si diffusion is observed.


1995 ◽  
Vol 06 (01) ◽  
pp. 163-210 ◽  
Author(s):  
STEPHEN I. LONG

The performance of high speed digital integrated circuits, defined here as those requiring operation at high clock frequency, is generally more sensitive to material properties and process techniques than ICs used at lower frequencies. Obtaining high speed and low power concurrently is especially challenging. Circuit architectures must be selected for the device and application appropriately. This paper presents simple models for high speed digital IC performance and applies these to the FET and bipolar transistor. Heterojunction devices are compared with those using single or binary materials. Circuits for high speed SSI and low power VLSI applications are described, and their performance is surveyed.


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