scholarly journals Improvement of the Charge Retention of a Non-Volatile Memory by a Bandgap-Engineered Charge Trap Layer

Author(s):  
Ziyang Cui ◽  
Dongxu Xin ◽  
Taeyong Kim ◽  
Jiwon Choi ◽  
Jaewoong Cho ◽  
...  

Abstract In recent years, research based on HfO2 as a charge trap memory has become increasingly popular. This material, with its advantages of moderate dielectric constant, good interface thermal stability and high charge trap density, is currently gaining in prominence in the next generation of nonvolatile memory devices. In this study, memory devices based on a-IGZO thin-film transistor (TFT) with HfO2/Al2O3/HfO2 charge trap layer (CTL) were fabricated using atomic layer deposition. The effect of the Al2O3 layer thickness (1, 2, and 3 nm) in the CTL on memory performance was studied. The results show that the device with a 2-nm Al2O3 layer in the CTL has a 2.47 V memory window for 12 V programming voltage. The use of the HfO2/Al2O3/HfO2 structure as a CTL lowered the concentration of electrons near the tunnel layer and the loss of trapped electrons. At room temperature, the memory window is expected to decrease by 0.61 V after 10 years. The large storage window (2.47 V) and good charge retention (75.6% in 10 years) of the device under low-voltage conditions are highly advantageous. The charge retention of the HfO2/Al2O3/HfO2 trap layer affords a feasible method for fabricating memory devices based on a-IGZO TFT.

2011 ◽  
Vol 181-182 ◽  
pp. 307-311
Author(s):  
Hong Hanh Nguyen ◽  
Ngoc Son Dang ◽  
Van Duy Nguyen ◽  
Kyungsoo Jang ◽  
Kyunghyun Baek ◽  
...  

Nonvolatile memory (NVM) devices with nitride-nitride-oxynitride (NNO) stack structure using Si-rich silicon nitride (SiNx) as charge trapping layer on glass substrate were fabricated. Amorphous silicon clusters existing in the Si-rich SiNxlayer enhance the charge storage capacity of the devices. Low temperature poly-silicon (LTPS) technology, plasma-assisted oxidation/nitridation method to form a uniform ultra-thin tunneling layer, and an optimal Si-rich SiNxcharge trapping layer were used to fabricate NNO NVM devices with different tunneling thickness 2.3, 2.6 and 2.9 nm. The increase memory window, lower voltage operation but little scarifying in retention characteristics of nitride trap NVM devices had been accomplished by reducing the tunnel oxide thickness. The fabricated NVM devices with 2.9 nm tunneling thickness shows excellent electrical properties, such as a low threshold voltage, a high ON/OFF current ratio, a low operating voltage of less than ±9 V and a large memory window of 2.7 V, which remained greater than 72% over a period of 10 years.


2016 ◽  
Vol 39 ◽  
pp. 134-150
Author(s):  
Valerii Ievtukh ◽  
A. Nazarov

In this work, nanocrystal nonvolatile memory devices comprising of silicon nanocrystals located in gate oxide of MOS structure, were comprehensively studied on specialized modular data acquisition setup developed for capacitance-voltage measurements. The memory window formation, memory window retention and charge relaxation experimental methods were used to study the trapping/emission processes inside the dielectric layer of MOS capacitor memory. The trapping/emission processes were studied in standard bipolar memory mode and in new unipolar memory mode, which is specific for nanocrystalline nonvolatile memory. The analysis of experimental results shown that unipolar programming mode is more favourable for nanocrystalline memory operation due to lower wearing out and higher breakdown immunity of the MOS device’s oxide. The study was performed for two types of nanocrystalline memory devices: with one and two silicon nanocrystalline 2D layers in oxide of MOS structure correspondingly. The electrostatic modelling was presented to explain the experimental results.


2010 ◽  
Vol 96 (5) ◽  
pp. 052907 ◽  
Author(s):  
Youngmin Park ◽  
Jong Kyung Park ◽  
Myeong Ho Song ◽  
Sung Kyu Lim ◽  
Jae Sub Oh ◽  
...  

2006 ◽  
Vol 16 (04) ◽  
pp. 959-975 ◽  
Author(s):  
YUEGANG ZHANG

The technology progress and increasing high density demand have driven the nonvolatile memory devices into nanometer scale region. There is an urgent need of new materials to address the high programming voltage and current leakage problems in the current flash memory devices. As one of the most important nanomaterials with excellent mechanical and electronic properties, carbon nanotube has been explored for various nonvolatile memory applications. While earlier proposals of "bucky shuttle" memories and nanoelectromechanical memories remain as concepts due to fabrication difficulty, recent studies have experimentally demonstrated various prototypes of nonvolatile memory cells based on nanotube field-effect-transistor and discrete charge storage bits, which include nano-floating gate memory cells using metal nanocrystals, oxide-nitride-oxide memory stack, and more simpler trap-in-oxide memory devices. Despite of the very limited research results, distinct advantages of high charging efficiency at low operation voltage has been demonstrated. Single-electron charging effect has been observed in the nanotube memory device with quantum dot floating gates. The good memory performance even with primitive memory cells is attributed to the excellent electrostatic coupling of the unique one-dimensional nanotube channel with the floating gate and the control gate, which gives extraordinary charge sensibility and high current injection efficiency. Further improvement is expected on the retention time at room temperature and programming speed if the most advanced fabrication technology were used to make the nanotube based memory cells.


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